We are Silicon Labs. We are a leader in secure, intelligent wireless technology for a more connected world. Our integrated hardware and software platform, intuitive development tools, unmatched ecosystem and robust support make us the ideal long-term partner in building advanced industrial, commercial, home and life applications. We make it easy for developers to solve complex wireless challenges throughout the product lifecycle and get to market quickly with innovative solutions that transform industries, grow economies and improve lives.
Meet the Team
Our highly technical and strategic Global Verification Team drives verification excellence across IP, SoC, Subsystem, AMS, and Performance in a cutting-edge semiconductor design organization. This role is critical in ensuring pre-silicon quality, reducing respins, and enhancing execution efficiency through advanced verification methodologies and generative AI integration.

Responsibilities

• Develop and execute a comprehensive, unified verification strategy across IP, SoC, Subsystems, AMS, and Performance.
• Define benchmarks for verification efficiency, improving cycle time and quality metrics to enhance execution rigor.
• Drive functional, performance, power, and mixed-signal verification using state-of-the-art methodologies.
• Ensure alignment of pre-silicon verification coverage with system-level validation and post-silicon quality objectives.
• Champion next-generation verification methodologies, including formal verification, hybrid verification, emulation, and simulation acceleration.
• Lead coverage-driven verification, focusing on system use cases, corner cases, and cross-domain interactions.
• Drive the integration of Generative AI and ML techniques to automate test generation, coverage closure, and debugging.
• Establish a data-driven approach for verification quality and efficiency improvements.
• Work closely with SoC architects, platform engineers, system validation, and SQA teams to ensure holistic pre-silicon verification coverage.
• Partner with EDA vendors and industry consortia to drive innovation and best practices.
• Establish a robust verification sign-off process, ensuring functional correctness, power/performance validation, and compliance to specifications.
• Define KPIs for verification coverage, bug rate reduction, and cycle time improvement.

Skills You Will Need :

• 20+ years of experience in semiconductor, with a strong focus on IP, SoC, Subsystem, AMS verification.
• Leadership experience in driving verification teams across multiple geographies.
• Strong cross-functional collaboration skills with system architects, software, and validation teams.
• Excellent communication and ability to influence at executive and engineering levels.

Benefits & Perks

You can look forward to the following benefits:

• Great medical (Choice of PPO or Consumer Driven Health Plan with HSA), dental and vision plans
• Highly competitive salary
• 401k plan with match and Roth plan option
• Equity rewards (RSUs)
• Employee Stock Purchase Plan (ESPP)
• Life/AD&D and disability coverage
• Flexible spending accounts
• Adoption assistance
• Back-Up childcare
• Additional benefit options (Commuter benefits, Legal benefits, Pet insurance)
• Flexible PTO schedule
• 3 paid volunteer days per year
• Charitable contribution match
• Tuition reimbursement
• Free downtown parking
• Onsite gym
• Monthly wellness offerings
• Free snacks
• Monthly company updates with our CEO

The annualized base pay range for this role is expected to be between $206,500 - $383,500 USD. Actual base pay could vary based on factors including but not limited to experience, geographic location where work will be performed and applicant’s skill set. The base pay is just one component of the total compensation package for employees. Other rewards may include an annual cash bonus, equity package and a comprehensive benefits package.
We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status

• Develop and execute a comprehensive, unified verification strategy across IP, SoC, Subsystems, AMS, and Performance.
• Define benchmarks for verification efficiency, improving cycle time and quality metrics to enhance execution rigor.
• Drive functional, performance, power, and mixed-signal verification using state-of-the-art methodologies.
• Ensure alignment of pre-silicon verification coverage with system-level validation and post-silicon quality objectives.
• Champion next-generation verification methodologies, including formal verification, hybrid verification, emulation, and simulation acceleration.
• Lead coverage-driven verification, focusing on system use cases, corner cases, and cross-domain interactions.
• Drive the integration of Generative AI and ML techniques to automate test generation, coverage closure, and debugging.
• Establish a data-driven approach for verification quality and efficiency improvements.
• Work closely with SoC architects, platform engineers, system validation, and SQA teams to ensure holistic pre-silicon verification coverage.
• Partner with EDA vendors and industry consortia to drive innovation and best practices.
• Establish a robust verification sign-off process, ensuring functional correctness, power/performance validation, and compliance to specifications.
• Define KPIs for verification coverage, bug rate reduction, and cycle time improvement