Sr.DSP Engineer (Hybrid, Aberdeen Proving Ground Maryland) at Fairwinds Technologies, L

Aberdeen Proving Ground, Maryland, United States -

Full Time

Start Date

Immediate

Expiry Date

21 May, 26

Salary

200000.0

Posted On

21 Feb, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

DSP Algorithm Design, RF Communications, Xilinx UltraScale+, RFSoC, Versal Platforms, FPGA Implementation, Embedded Systems, Signal Processing, MATLAB/Simulink, Python, C/C++, Hardware Acceleration, Fixed-Point Design, Interference Mitigation, DoD Secret Clearance, Algorithm Optimization

Industry

Defense and Space Manufacturing

Description

Senior DSP Engineer Location: Aberdeen Proving Ground (APG), MD Type: Hybrid (Up to 40 hours/week in-office as needed) Target Recruiting Area: Mid-Atlantic Region About Fairwinds Technologies Fairwinds Technologies is a U.S.-based engineering firm specializing in Satellite Communications (SATCOM), RF Transmission Systems, Network Design, Systems Integration, and Digital Signal Processing (DSP). We support Command, Control, Communications, and Computer (C4) systems in austere military environments, delivering advanced communications, networking, and IT solutions to defense and civilian agencies worldwide. Position Overview We are seeking a Senior DSP Engineer with deep expertise in RF communications signal processing and practical, hands-on implementation experience on Xilinx UltraScale+, RFSoC, and Versal platforms. The ideal candidate holds a Master’s or PhD in Electrical Engineering, Computer Engineering, Applied Mathematics, or a related field, and has a proven track record of developing and fielding innovative DSP solutions for real-world RF systems (not just simulations). This role requires an innovative, out-of-the-box thinker, someone who can go beyond cookie-cutter DSP blocks to develop novel or nontraditional approaches when performance, latency, interference, or mission constraints demand it. The engineer will collaborate across RF, FPGA/embedded, systems, and customer teams to deliver mission-critical communications and signal processing capabilities. This position reports to the Chief Technology & Strategy Office and involves close collaboration with customers and engineering teams to deliver innovative solutions for RF Tactical & Naval Military Solutions, as well as strategic border protection applications. Key Responsibilities * Design, develop, and optimize DSP algorithms for RF communications signals, including waveform processing in contested and dynamic environments (e.g., filtering, synchronization, channelization, detection/estimation, demodulation/decoding, interference mitigation). * Lead algorithm development from concept through prototype to implementation, balancing performance, latency, robustness, and computational constraints. * Implement and validate DSP solutions on heterogeneous compute platforms including Xilinx RFSoC, UltraScale+, and Versal, leveraging PL/PS resources and hardware acceleration as appropriate. * Collaborate with FPGA engineers to translate algorithms into hardware-realizable architectures (fixed-point design, throughput/latency optimization, resource trade studies, hardware-friendly formulations). * Work closely with embedded software engineers to integrate real-time DSP pipelines (drivers, data movement, DMA, streaming interfaces, buffering strategies, runtime configuration). * Develop and execute test/verification strategies using lab instrumentation and captured RF datasets; characterize performance under impairments (CFO/phase noise, multipath, fading, interference/jamming, nonlinearities). * Develop simulation and analysis environments (e.g., MATLAB/Simulink, Python) and correlate simulation results to hardware/field behavior. * Provide technical leadership: define architecture, conduct design reviews, mentor engineers, and communicate trade-offs clearly to stakeholders. * Produce high-quality documentation (DSP design descriptions, algorithm specs, performance reports, ICD inputs, SBIR deliverables as required). * Support integration, debug, and field test activities spanning DSP, RF, FPGA, and embedded software domains. Required Qualifications * Master’s degree or PhD in Electrical Engineering, Computer Engineering, Applied Mathematics, Physics, or related field. * 15+[KA1] [2] years (typical) of relevant DSP engineering experience with demonstrated delivery of RF communications signal processing solutions. * Proven practical experience processing RF communications signals (beyond academic examples), including development, validation, and performance characterization. * Strong fundamentals in communications and statistical signal processing (detection/estimation, synchronization, spectral analysis, filtering, modulation/demodulation concepts). * Experience implementing DSP on embedded/real-time systems and/or hardware-accelerated platforms, including Xilinx UltraScale+, RFSoC, and Versal. * Ability to simulate and/or model DSP algorithms in a suitable environment (MATLAB, Modelsim, etc.), with the ability to define or implement fixed-point functions, where applicable * Demonstrated ability to create innovative DSP approaches when standard methods are insufficient—creative problem solver with strong analytical rigor. * Proficiency in at least one of: Python, C/C++, HDL (VHDL or Verilog), MATLAB (or equivalent), with disciplined software engineering practices. * Experience working with cross-functional teams (RF, FPGA, embedded, systems) to deliver complete system solutions. * U.S. Citizenship and an active DoD Secret (or higher) security clearance (or ability to obtain). Additional Preferred Qualifications * Experience with multi-carrier channelizers, DDC/DUC architectures, polyphase filter banks, efficient FFT-based processing, and real-time spectral sensing. * Experience with timing/synchronization challenges (PPS/10 MHz disciplining, phase-coherent multichannel systems, TDOA/FDOA concepts). * Familiarity with JESD204B/C-based high-speed converter interfaces and RF front-end integration considerations (AGC, spur mitigation, calibration). * Exposure to electronic warfare / interference environments, adaptive filtering, beamforming concepts, or robust waveform processing under jamming. * Experience with embedded Linux on Zynq/RFSoC/Versal platforms and real-time streaming architectures. * Scripting and automation (Python) for test harnesses, regression, and performance sweeps. * Working knowledge of applicable 3GPP 38.211 - 38.214 (Minimum Release 17) standards related to the 4G/5G physical layer * Experience supporting DoD SBIR projects or similar government-funded R&D efforts. Supervisory Responsibility This position does not require direct supervisory responsibility; however, the engineer may mentor junior engineers and support cross-functional technical leadership. Work Environment This position is primarily performed in a traditional office environment. Some remote/hybrid work is also possible. Physical Demands While performing the duties of this job, the employee is occasionally required to stand; walk; sit; use hands to finger, handle, or feel objects, tools or controls; use fingers and hands to type or write; reach with hands and arms; talk or hear. Specific vision abilities required by the job include close vision, distance vision, color vision, peripheral vision, depth perception Position Type/Expected Hours of Work This is a full-time, exempt position, working Monday through Friday; 40 hours per work week; occasional evening and weekend work may be required as job duties demand. Some flexibility in actual work hours may be offered. Travel Must be willing to travel 25–30% when required. Work Authorization/Security Clearance Must be eligible to work in the US and possess or obtain a Secret level clearance. Other Duties Please note this job description is not designed to cover or contain a comprehensive listing of activities, duties, or responsibilities that are required of the employee for this job. Duties, responsibilities, and activities may change at any time with or without notice. AAP/EEO Statement Fairwinds Technologies, LLC is an Equal Opportunity Employer – M/F/Veteran/Disability/Sexual Orientation/Gender Identity Why Join Us Opportunity to work on cutting-edge technologies and innovative projects, including DoD SBIR initiatives. Collaborative and inclusive work environment. Competitive salary and benefits package. Professional development and growth opportunities. [KA1]7+ seems minimal for a senior role. Takes many years to get good at this. 15+ is my recommendation, otherwise, this would be more of a junior role. [2]updated, thanks

Responsibilities

The engineer will design, develop, and optimize Digital Signal Processing (DSP) algorithms for RF communications signals, leading development from concept through implementation on platforms like Xilinx RFSoC and Versal. Key tasks include collaborating with cross-functional teams to translate algorithms into hardware-realizable architectures and developing robust test/verification strategies.