Sr /IC Design Engineer (Design Verification)

at  Ethos Search Associates Pte Ltd

Singapore, Southeast, Singapore -

Start DateExpiry DateSalaryPosted OnExperienceSkillsTelecommuteSponsor Visa
Immediate12 Jun, 2024USD 9000 Monthly12 Mar, 20241 year(s) or aboveCompletion,Verilog,Analytical Skills,FpgaNoNo
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Description:

JOB DESCRIPTIONS

  • Develop and Review Test Plan based on IC design specification
  • Develop constrained-Random verification environment for complex DUT
  • Develop/Modify Testbenches using UVM/SystemVerilog for Pre-Silion IP or SOCs
  • Implement coverage matrix using cover point and assertion
  • Create and debug tests for DUT
  • Resolve bugs with remote designers

REQUIREMENTS

  • Bachelor/Masters Degree in Electrical/Electronics/Computer Engineering with min 1 year of experience
  • Hands-on experience in Silicon/ IP verification using SystemVerilog/ UVM
  • Strong understanding of verification process from test plan to coverage completion
  • Strong communication and Analytical skills
  • Understanding of HDL (Verilog, VHDL)Experience with designing with FPGA using Vivado is a plus

  • Ethos Search Associates Pte. Ltd.
    EA Licence No: 13C6655
    EA Reg No: R1109557 Ros

Responsibilities:

Please refer the Job description for details


REQUIREMENT SUMMARY

Min:1.0Max:6.0 year(s)

Information Technology/IT

IT Software - QA & Testing

Information Technology

Graduate

1 year of experience

Proficient

1

Singapore, Singapore