Sr. Principal AE - Verification IP, HPC Protocols at Cadence Design Systems

San Jose, California, United States -

Full Time

Start Date

Immediate

Expiry Date

19 Jun, 26

Salary

191100.0

Posted On

21 Mar, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Verification IP, HPC Protocols, PCIe, UCIe, AMBA, CXL, UALink, UEC, Verilog, System Verilog, UVM, Debugging, Pre-Silicon Verification, Waveform Viewers, Simulation Analysis Tools, Technical Training

Industry

Software Development

Description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Title: AE - Verification IP, High-Performance Computing (HPC) Protocols Location: San Jose, CA Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. Job Summary: In this role, you bridge the gap between Cadence's R&D and its customers by providing technical expertise for their Verification IP (VIP) portfolio. Drives development deployment of products and technologies and has material responsibility for the success of that product/technology. VIP Application Engineer is expected to be an expert in PCIe, UCIe and AMBA domain of Verification IP family- protocol and product-wise. Main role is to help accelerate VIP portfolio adoption at Cadence’s top tier customers by supporting pre-sales technical activities. The role demands strong independent execution combined with close collaboration across global R&D, Marketing, Product Engineering, Sales, and Support teams to ensure full product alignment. This role requires approximately 10% travel on average. Job responsibilities: Conduct product demonstrations, manage customer evaluations, and run benchmarks to prove tool value Deploy and integrate VIP into customer environments Partner with Sales and Marketing to understand customer requirements and drive business closure Effectively communicate with customers and PE/R&D teams and get an alignment on the requirements Mentor junior engineers and provide technical training to customers to foster excellence and product adoption VIP AI Technology Enablement for Customers Build customer trust and relationship by delivering quality and timely solutions Participate in evaluation and win new business Experience and Technical Skills required : Experience with PCIe protocol is a must, CXL, UCIe, UALink, UEC protocols knowledge 8+ years of Design Verification Experience Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field. Strong programming skills in Verilog, System Verilog and UVM Advanced skills in debugging pre-silicon verification failures using waveform viewers and simulation analysis tools Excellent communication skills and the ability to thrive in a team-oriented environment Self-motivated, with a proactive approach to problem solving, continuous learning, and innovation The annual salary range for California is $102,900 to $191,100. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more. We’re doing work that matters. Help us solve what others can’t. Additional Jobs Equal Employment Opportunity Policy: Cadence is committed to equal employment opportunity throughout all levels of the organization. Read the policy(opens in a new tab) We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact staffing@cadence.com. Privacy Policy: Job Applicant If you are a job seeker creating a profile using our careers website, please see the privacy policy(opens in a new tab). E-Verify Cadence participates in the E-Verify program in certain U.S. locations as required by law. Download More Information on E-Verify (64K) Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

Responsibilities

This role involves bridging the gap between R&D and customers by providing technical expertise for the Verification IP (VIP) portfolio, driving product deployment, and supporting pre-sales technical activities to accelerate portfolio adoption at top-tier customers. Responsibilities include conducting product demonstrations, managing evaluations, running benchmarks, and deploying/integrating VIP into customer environments.