Sr Server Performance Architect at Advanced Micro Devices, Inc

Austin, Texas, United States -

Full Time

Start Date

Immediate

Expiry Date

28 Aug, 26

Salary

0.0

Posted On

30 May, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Performance Modeling, CPU Microarchitecture, x86 ISA, System-Level Performance Verification, Emulation Platforms, RTL Coding, Performance Monitoring Counters, AI/ML Infrastructure, Performance Profiling, Hardware/Software Co-design, SoC Design, Team Leadership, Stakeholder Management, Data-Driven Analysis, SPEC CPU, Performance Triage

Industry

Semiconductor Manufacturing

Description

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. AMD is looking for an outstanding technical contributor to help architect, validate & optimize performance of new features thru full chip simulation & emulation platforms for AMD-based next-generation servers . As a passionate and dedicated Server Systems Performance Architect in the Server Performance Group, you will identify new opportunities to optimize server silicon for throughput and latency by identifying opportunities across all parts of silicon micro architecture and design spanning CPU, Data Fabric, Memory subsystem and IO. You will validate and analyze performance of various design features in presilcon design env and correlate the profiling data with AMD performance model and eventually AMD silicon. You will quantify and isolate performance bottlenecks, and share the insights to help new drive features into the next generation of server CPUs. The ideal candidate is expected to be well informed on latest trends in server design and verification, have a well rounded understanding of performance requirements for server market and be able to quickly ascertain, in a data-driven manner, how next generation server CPUs and platforms should be engineered to support those needs Key Responsibilities: Team Leadership Lead and mentor a high-performing team of performance verification engineers. Foster a culture of innovation, technical rigor, and continuous improvement. Provide strategic direction across multiple concurrent verification programs. Program Leadership Define and execute the performance verification strategy for high-performance x86 CPU cores. Collaborate with architecture, u-arch, RTL, performance modeling, firmware, and software teams to define and validate performance KPIs. Ensure timely delivery of simulation/emulation results, and optimization feedback loops. Performance Analysis & Correlation Develop and execute performance verification plans targeting IPC, latency, throughput, and power efficiency. Capability to debug performance outliers through Performance Monitoring Counters (PMC). Drive correlation between RTL and performance models, ensuring architectural intent is met. Analyze performance bottlenecks using simulation, emulation, and silicon data. Toolchain & Methodology Build and maintain scalable, modular performance verification infrastructure. Lead emulation-based performance setup and debug, enabling early performance validation. Integrate performance regression, profiling, and analysis flows using industry-standard and custom tools. Collaborate with compiler and OS teams to ensure software stack alignment with hardware performance goals. AI-Driven Infrastructure Drive the development of AI/ML-based infrastructure to automate performance analysis, anomaly detection, and efficiency improvements. Leverage data-driven techniques to optimize verification coverage and reduce debug cycles. Cross-Functional Collaboration Partner with x86 architecture, RTL design, physical design, and software teams to ensure performance targets are met. Influence design decisions through data-backed performance insights. Stakeholder Management Align verification goals with business and product roadmaps. Communicate performance status, risks, and trade-offs to executive leadership and stakeholders. Industry Awareness Stay current with trends in CPU architecture, performance modeling, and verification technologies. Evaluate and adopt emerging tools and techniques to maintain a competitive edge. Preferred Experience 15+ years of industry experience with performance modeling and simulation tools (e.g., cycle-accurate simulators, emulators) with strong background in CPU microarchitecture, performance analysis, and system-level performance verification. Proven leadership in managing large, cross-functional engineering teams. Familiarity with PMC DV, latency and throughput validation, emulation platforms, and performance debug flows. Deep understanding of x86 ISA, microarchitecture, and performance metrics. Experience in developing performance test suites, performance triage tools, and simulation/emulation infrastructure. Expertise in performance analysis tools, correlation techniques, and workload optimization. Strong analytical and problem-solving skills with a data-driven mindset. Excellent communication and interpersonal skills. Deep knowledge of modern out-of-order CPU cores, memory subsystems, and performance modeling is a plus. Familiarity with performance benchmarks like SPEC CPU. Experience with ML/AI techniques/frameworks for performance triage, infrastructure automation and prediction is a plus. Exposure to high-performance computing (HPC), virtualization, or server-class CPUs. Background in hardware/software co-design and performance-aware compiler optimizations. Familiarity with pre-silicon and post-silicon debug methodologies. Position Requirements: Should have executed Emulation based functional and performance verification for multimillion gate SoC designs Should have strong exposure to RTL coding and SOC bringup debug Exceptional foundation in systems architecture, cutting across CPU, memory, storage and I/O subsystems Experience with hardware performance counter monitoring tools Should have exposure to performance profiling tools, preferably x86 based (e.g. linux perf, Windows perfmon) MS/PhD in Computer Engineering / relevant coursework / thesis Excellent communication skills (verbal, written, and presentation) 12 years relevant industry experience This role is not eligible for visa sponsorship. #LI-RL1 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

Responsibilities

Lead a team of engineers to architect, validate, and optimize the performance of next-generation server CPUs using simulation and emulation platforms. Identify performance bottlenecks across CPU, Data Fabric, Memory, and IO to drive design improvements for throughput and latency.