ABOUT US:

Innatera is a rapidly growing Dutch semiconductor company that develops ultra-efficient neuromorphic processors for AI at the edge. These microprocessors mimic the brain’s mechanisms for processing fast data streams from sensors, enabling complex turn-key sensor analytics functionalities, with 10,000x higher performance per watt than competing solutions. Innatera’s technology serves as a critical enabler for next-generation use cases in the IoT, wearable, embedded, and automotive domains.
We’re looking for a Staff Digital Design Engineer to take technical ownership of RISC-V-based CPU architecture and subsystem integration in our next-generation neuromorphic SoCs.
In this high-impact role, you’ll lead the design and implementation of advanced CPU cores and digital IPs, from high-level specification to final sign-off. You’ll be instrumental in driving architectural decisions, RTL development, and SoC integration, while collaborating closely with verification, backend, and software teams.

YOUR EXPERIENCE INCLUDES:

• 7+ years of experience in digital design, with a strong focus on CPU architecture and micro-architecture development;
• Demonstrable experience in designing and implementing RISC-V based CPU cores (e.g., custom cores, modifications to open-source cores);
• Deep understanding of CPU pipeline stages, memory hierarchies (caches, MMU), interrupt handling, and bus interfaces related to CPU design;
• Expertise in RTL coding (Verilog/System Verilog) and debugging for complex digital modules, particularly CPU designs;
• Strong knowledge of SoC architecture and subsystem integration, specifically concerning CPU integration;
• Proven experience in front-end design tasks for CPU cores, including synthesis, STA, and formal equivalence checking;
• Solid understanding of digital verification methodologies and working collaboratively with verification teams, with a focus on CPU verification;
• Familiarity with common communication protocols (e.g., AMBA AXI/AHB) relevant to CPU-to-system interfaces.

Please refer the Job description for details