Start Date
Immediate
Expiry Date
14 Sep, 26
Salary
0.0
Posted On
16 Jun, 26
Experience
5 year(s) or above
Remote Job
Yes
Telecommute
Yes
Sponsor Visa
No
Skills
SystemVerilog, UVM, Constrained Random Verification, Formal Verification, RTL Design, Testbench Architecture, Functional Coverage, Code Coverage, Questa, Mixed-Signal Verification, Python, Tcl, Analytical Debugging, Cross-functional Collaboration, Technical Communication, AI-enabled Verification
Industry
Semiconductor Manufacturing