Staff Engineer, ASIC Development Engineering (IP Verification ) at Sandisk

Bengaluru, karnataka, India -

Full Time

Start Date

Immediate

Expiry Date

02 Aug, 26

Salary

0.0

Posted On

04 May, 26

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

RTL Verification, SystemVerilog, UVM, SVA, FPGA Design, EDA Tools, Python, Perl, Constrained-Random Verification, Metric-Driven Verification, AI/ML for Hardware Verification, Git, eMMC, UFS, PCIe, DDR4

Industry

Semiconductor Manufacturing

Description

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Job Description The FPGA design team, part of the (VHS) group is responsible for developing a wide range of FPGA solutions for post-silicon validation of memory devices across Western Digital. Your main responsibilities as part of a winning group: Complex logic blocks & IPs design Work in a multi-disciplinary environment with a variety of complex interfaces. Qualifications BE/ME in ECE, Electronics, or a related engineering discipline. 5–7 years of hands-on experience in RTL verification at Block/IP/Sub-system/SoC levels. Proficient in SystemVerilog for verification; advanced experience with SVA and UVM is a strong advantage. Deep knowledge of EDA tools such as Cadence NCSim, SimVision, vManager, and waveform-debug tools from Mentor/Synopsys. Experience with FPGA-based verification environments. Practical experience with SV- UVM-based simulation environments. Skilled in developing testbenches for constrained-random and metric-driven verification. Strong debugging capability with the ability to root-cause design issues and communicate findings clearly in written form. Exposure to standard protocols such as eMMC, UFS, USB, PCIe, and DDR4 is an advantage. Proficiency in Perl/Python scripting; ability to automate flows, logs, and regressions. Understanding of AI/ML fundamentals as applied to hardware verification workflows. Experience using ML techniques for regression triage, failure clustering, anomaly detection, or coverage prediction. Strong problem-solving skills with the ability to break down complex issues and apply appropriate techniques to achieve results. Excellent communication and collaboration skills across local and global teams. Ability to coordinate and communicate across multiple interfaces within the organization. Innovative mindset; capable of leveraging new technologies, including AI/ML, to improve verification efficiency, organizational workflows, and alignment between technical and business goals. Familiarity with version control systems such as Git. Additional Information Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at [email protected] to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying. Job Type (exemption status): Exempt position - Please see related compensation & benefits details below Business Function: ASIC Development Engineering Work Location: Bangalore Cosmos Office--LOC_WDT_Bangalore Cosmos Office

Responsibilities

Responsible for designing complex logic blocks and IPs for FPGA solutions used in post-silicon validation of memory devices. The role involves working in a multi-disciplinary environment to handle various complex interfaces.