Staff Engineer, ASIC Development Engineering (SoC Verification) at Sandisk

Bengaluru, karnataka, India -

Full Time

Start Date

Immediate

Expiry Date

29 Jan, 26

Salary

0.0

Posted On

31 Oct, 25

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

SoC Verification, Post Silicon Debug, C/Verilog, DFx Architecture, Testbench Architecture, Verification Methodologies, Pattern Generation, Debugging, Root Cause Analysis, Simulation, Pre-Silicon Validation, Collaboration, Communication, Problem Solving, Multi-tasking, Teamwork

Industry

Semiconductor Manufacturing

Description

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Job Description Play senior verification member role and development of verification of SoC level scenarios and IP integration verification Owning the Testbench architecture and development Thriving to bring innovation in Verification Methodologies and optimizing the flow and turn around time. Key contributor for post silicon validation support, pattern generation. Develop tests , Debug failures and perform root cause analysis Develop/execute/debug test cases in simulation and Pre-Sillicon Validation on palladium Collaborate with validation and FW teams. Working closely with different teams within organization and tracking bugs to closure Be involved in SOC bring-up and Pre/Post Si Validation Qualifications B.E/B.Tech with 5+ years of experience in SoC verification/post silicon debug Excellent design and verification concepts Experience in C/Verilog based SoC verification and methodologies Experience in DFx architecture The ideal individual must have proven ability to achieve results in a fast moving, dynamic environment. Self-motivated and self-directed, however, must have demonstrated ability to work well with people A proven desire to work as a team member, both on the same team and outside of the team. Ability to troubleshoot and analyze complex problems. Ability to multi-task and meet deadline Excellent communication (written and verbal) and interpersonal skills Additional Information Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at [email protected] to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying. ion will be kept confidential according to EEO guidelines.

Responsibilities

The role involves being a senior verification member responsible for the development of SoC level scenarios and IP integration verification. The candidate will also own the Testbench architecture and contribute to post-silicon validation support.