STAFF Engineer- DEG Layout at Micron Technology

Bengaluru, karnataka, India -

Full Time

Start Date

Immediate

Expiry Date

07 Jan, 26

Salary

0.0

Posted On

09 Oct, 25

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Layout Design, Memory Circuits, Logic Circuits, Analog Circuits, DRC, LVS, Physical Design, Timing Closure, Power Planning, Perl, Tcl, Python, Synthesis, Verification, Cross-Functional Collaboration, Team Leadership

Industry

Semiconductor Manufacturing

Description

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: Contributing to the development of new product opportunities by working on layout, and optimization of Memory/Logic/Analog circuits Layout design independently or lead functional block /Partition/Fullchip Overseeing and managing the layout process including floor-planning, placement, and routing Demonstrate commitment and responsibility towards the work/assignment, own the task and take proactive measures to finish the work as per the schedule Efficiently plan the task based on project timelines in agreement with project lead. Course correct the plan if there is any change in the task example ECOs Must be able to interpret and clean DRC, LVS and other PDV runs or tools whenever requirement arises. Should be able to debug and resolve complex verification issues. Should be able to Identify gap or improvement area in current methodology and drive improvement. Ensure all the layout done and released from India team is as per quality guidelines, show continuous improvement in the quality of layout. should be able to train, mentor new joiners and other team members. Expert in technical and schedule perspective to review, plan, estimate and delegate the blocks. Responsible for release of block on time as per the quality guidelines. Create a culture to drive or inculcate new ideas/solutions and drive them independently till they are absorbed in the system or current flow. Working experience in multiple silicon-proven tape-outs with multimillion gate count designs. Hands-on experience in synthesis using Design Compiler or Genus. Experience in writing and modifying place and route tech files and calibrating with Calibre DRC. Proven experience in physical design, including floor planning, placement, clock tree synthesis, routing, and timing closure (both Synopsys and Cadence EDA tools). Experience in power planning, IR drop, and EM analysis. Experience in logic block and chip-level verification. Very good understanding of timing constraints and their closure in both low power and high-performance designs. Knowledge of standard cell libraries and liberty files. Ability to understand standard cell layouts and guide the team based on routing challenges to meet target PPA specifications. Strong skills in Perl, Tcl, and Python. Experience in design enablement, implementation flows, and methodologies for deep submicron technologies. Collaborating with cross-functional teams to deliver high-quality design solutions. Enhancing efficiency and performance of design projects. Excellent communication skills to convey complex ideas. Autonomous and capable of making timely decisions. Able to handle interruptions and maintain focus on goals. Collaborative team player who enjoys working with cross-functional teams. Innovative thinker who stays updated with industry trends and best practices. Leading and training a team of 3-5 members. About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification. Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.

Responsibilities

The role involves contributing to the development of new product opportunities through layout design and optimization of circuits. Responsibilities also include managing the layout process and ensuring quality guidelines are met.