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Staff Engineer - DFT Digital Design at Infineon Technologies AG Australia

, , Singapore -

Full Time

Start Date

Immediate

Expiry Date

12 Feb, 26

Salary

0.0

Posted On

15 Nov, 25

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Dft Instruments Integration, Verification, Atpg Scan Compression, Dft Rule Checking, Debugging, Test Pattern Debugging, Ate Machine, Failure Analysis, Digital Dft Design, Logic Simulation, Synthesis, Formal Verification, Linux Shell Scripting, Perl, Python, Tcl

Industry

Semiconductor Manufacturing

Description

Perform DFT instruments integration and veriﬁcation of test functions with industrial simulation tools and in-house veriﬁcation tools. Perform Block level and chip level ATPG Scan Compression integration, DFT rule checking and debugging for various testing modes. Assist test pattern debugging on ATE machine and carry out failure analysis. Bachelor's/Master's Degree in Electronics/Electrical Engineering or related ﬁelds with coursework in digital logic design, computer architecture. 3 ~10 years or more of hands-on experience in digital DFT design, logic simulation, synthesis, formal veriﬁcation, ATE test and silicon failure analysis. Solid knowledge and background in ASIC development. Proﬁciency in Linux shell scripting and scripting languages such as Perl, Python, Tcl, and Make. Having passion in technology; being ﬂexible, goal-oriented, and team player. Excellent verbal and written communication skills. Rank of position will be offered based on candidate's level of skill, knowledge and experience. We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills.

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Responsibilities

Perform DFT instruments integration and verification of test functions with industrial simulation tools and in-house verification tools. Assist test pattern debugging on ATE machine and carry out failure analysis.