Requirements:

• MS in ECE or Computer Science and 6+ years of experience or BS ECE/CS with 8+ years of experience, with at least 3 years focusing on MMU, caches, DMA, or related subsystems;
• Deep understanding of ARM architectures, M-profile preferred;
• Strong understanding with MMUs including virtual memory, paging, and physical address translation;
• Solid experience with DMA engines, chained and scatter/gather transfers. Hands-on experience profiling and optimizing memory access patterns, DMA throughput, and cache usage;
• Experience with memory protection, isolation, and secure DMA for trusted execution environments is a plus.
• Experience working with multicore embedded processing systems is preferred;
• Deep understanding of embedded RTOS required, Zephyr and FreeRTOS preferred;
• Experience with developing embedded MCU code in C and assembly language on Arm Cortex-M Processors;
• Experience with at least one MCU IDE from ARM, Keil, IAR, Eclipse, Ozone or other;
• Good hands-on experience on lab equipment such as oscilloscopes, logic analyzers etc., for debugging issues;
• Experience with Jira, Confluence, and collaboration tools;
• Experience with source code control systems (git) required;
• Understanding of software testing and test automation principles;
• Excellent problem-solving skills dealing with complex system-level issues related to HW/SW debug;
• Experience with scripting languages required, and python experience is specifically desirable;
• Strong communication and documentation skills

• Lead the design, development, and maintenance of the HAL interfaces for memory management unit (MMU) and Data Movement Engine (DME) subsystems, as well as Caches, MPU, and other general MCU management.
• Design, develop, and maintain examples and software test cases for these blocks.
• Take a key role in the pre-silicon verification on FPGA, as well as post-silicon bring up, verification, performance optimization, and debug, focusing on these blocks.
• Design, develop, and maintain real-time OS ports for Ambiq MCUs.
• Support design verification (DV) and validation engineers, field engineers, and key customers as needed.

Requirements:

• MS in ECE or Computer Science and 6+ years of experience or BS ECE/CS with 8+ years of experience, with at least 3 years focusing on MMU, caches, DMA, or related subsystems;
• Deep understanding of ARM architectures, M-profile preferred;
• Strong understanding with MMUs including virtual memory, paging, and physical address translation;
• Solid experience with DMA engines, chained and scatter/gather transfers. Hands-on experience profiling and optimizing memory access patterns, DMA throughput, and cache usage;
• Experience with memory protection, isolation, and secure DMA for trusted execution environments is a plus.
• Experience working with multicore embedded processing systems is preferred;
• Deep understanding of embedded RTOS required, Zephyr and FreeRTOS preferred;
• Experience with developing embedded MCU code in C and assembly language on Arm Cortex-M Processors;
• Experience with at least one MCU IDE from ARM, Keil, IAR, Eclipse, Ozone or other;
• Good hands-on experience on lab equipment such as oscilloscopes, logic analyzers etc., for debugging issues;
• Experience with Jira, Confluence, and collaboration tools;
• Experience with source code control systems (git) required;
• Understanding of software testing and test automation principles;
• Excellent problem-solving skills dealing with complex system-level issues related to HW/SW debug;
• Experience with scripting languages required, and python experience is specifically desirable;
• Strong communication and documentation skills.