Start Date
Immediate
Expiry Date
26 May, 26
Salary
0.0
Posted On
25 Feb, 26
Experience
10 year(s) or above
Remote Job
Yes
Telecommute
Yes
Sponsor Visa
No
Skills
Logic Synthesis, Static Timing Analysis, RTL-to-Gate Implementation, Timing Closure, SoCs, Advanced Technology Nodes, Synopsys Design Compiler, Cadence Genus, MMMC Constraints, PrimeTime, Tempus, ECOs, Tcl, Perl, Python, Low-Power Design
Industry
Semiconductor Manufacturing