Staff Engineer, VLSI Design Engineering (IO Design) at Sandisk

Bengaluru, karnataka, India -

Full Time

Start Date

Immediate

Expiry Date

18 Feb, 26

Salary

0.0

Posted On

20 Nov, 25

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

VLSI Design, Digital Custom Design, Analog Design, Mixed Signal Design, IO Circuit Design, High-Speed IO Design, Calibration, JTAG Design, Timing Finesim, Spice Tools, Automation, Scripting, Layout Techniques, Power Integrity, Signal Integrity, NAND Flash Design

Industry

Semiconductor Manufacturing

Description

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Job Description Actively contribute to provide Custom Datapath solutions for next generation Memory in advanced CMOS technology nodes. Designing Datapath (custom and/or RTL) Blocks, Full chip Timing Finesim Design closure to meet the specifications and product requirements Work closely with team and actively participate in technical discussions and reviews. Pro-actively get design issues/problems solved. Contribute to or propose innovative design solutions and design methodologies. Qualifications Bachelors/Masters degree in Electronics & Telecommunication/Electrical engineering (VLSI Design) Hands-on design knowledge on both Digital custom, Analog & mixed signal design environment. 4+ years of Experience on IO circuit blocks used in memory products like DDR4, DDR5, LPDDR4, LPDDR5, GDDR5, GDDR6 is desirable. NAND Flash Design knowledge is plus Familiar with custom design methodology & flow, Calibration, JTAG design requirements, understanding of High-speed IO circuit design including DLL, Rx, Tx and clocking circuits Knowledge of High Speed layout guidelines, analog layout techniques, including floor-planning, matching, shielding and parasitic optimization Familiarity with package/board/Power integrity /signal integrity constraints is a plus. Strong communication skills & circuit design knowledge is preferred. Tool knowledge: spice tools: finesim, hspice & other flows Good automation & scripting knowledge is plus. Additional Information Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at [email protected] to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.

Responsibilities

Actively contribute to provide Custom Datapath solutions for next generation Memory in advanced CMOS technology nodes. Design Datapath Blocks and ensure design issues are proactively solved while participating in technical discussions and reviews.