Staff Integration Engineer at Jireh Semiconductor
Hillsboro, OR 97124, USA -
Full Time


Start Date

Immediate

Expiry Date

16 Nov, 25

Salary

150000.0

Posted On

16 Aug, 25

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

Semiconductor Process Technology, Physics, Power Devices, Integration, Failure Analysis, Device Characterization, Process Integration

Industry

Electrical/Electronic Manufacturing

Description

POSITION SUMMARY

Jireh is looking for an experienced Process Integration Engineer to join their team. As a Process Integration Engineer, you will work in a dynamic team environment at AOS Semiconductor’s leading technology fabrication facility (Jireh Semiconductor) located in Hillsboro, Oregon. This focus of this position is to work with device/process module/product engineering group to develop silicon power device process technology and improve existing technology yield. Primary responsibilities are to process flow implementation, electrical characterization (failure analysis), and wafer level testing yield monitoring. We prefer to find a staff level candidate, but will also consider senior level candidates.

REQUIRED EDUCATION & EXPERIENCE

  • Master’s or PhD in Physics or a related degree
  • 10+ years of experience in silicon process integration preferred
  • Working knowledge in semiconductor process technology and wafer fabrication
  • The ideal candidate will have knowledge of semiconductor device physics and experience with device processing and integration, test structure definition, design rule generation, DOE, failure analysis, process control document (PCD) generation, and device characterization.

PREFERRED QUALIFICATIONS & SKILLS

  • Experience with high-voltage discrete power devices is preferred

How To Apply:

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Responsibilities
  • Power device (MOSFET//IGBT/TVS ) technologies new product introduction and yield improvement in Jireh Semiconductor
  • New Product Introduction
  • Collaborate with product engineering team to perform NPI (New Product Introduction) on existing platform (analysis DOE/Pre-Production lots data/documentation according NPI procedure to release new product)
  • Collaborate with design groups within the company to troubleshoot device related problem, provide documentation and expertise to maximize the efficient use of process technologies
  • Yield monitor/improvement
  • Daily monitor existing technologies wafer level testing yield
  • Low yield root cause identification (through failure analysis, inline data analysis and lot history)
  • Collaborate with process module groups to tighten inline control/new target/recipe optimization for continuous yield improvement
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