Staff Product Development Engineer at Advanced Micro Devices, Inc

Singapore, Singapore, Singapore -

Full Time

Start Date

Immediate

Expiry Date

24 May, 26

Salary

0.0

Posted On

23 Feb, 26

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

SoC/IP Validation, Characterization, Technical Leadership, Cross-functional Influence, Embedded Processor Systems, Coherent Interconnects, Memory Subsystems, Pre-Silicon, Post-Silicon, Emulation/FPGA Prototyping, Python, Tcl, Perl, Embedded C/C++, Linux, PCIe/CXL

Industry

Semiconductor Manufacturing

Description

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: You will help evaluate the performance of AMD AECG and Embedded products, guide, develop and execute IP and system characterization suites and volume system-level testing to guarantee design margins, identify problem areas and ensure the performance and quality of complex hardened IP and subsystems such as the embedded processor subsystems, platform management features and coherent interconnects within AECG products as a member of the product characterization team. THE PERSON: Driven, curious, and innovative; thrives in ambiguous problem spaces and pushes the boundaries of test methodology. Values open exchange of feedback and ideas; builds a culture of collaboration, rigor, and accountability. Influences cross-functional teams and leads by example to improve product quality and reliability. KEY RESPONSIBILITIES: Own the strategy and methodology for stress test workloads across processor subsystems, coherent interconnects, memory hierarchies, and I/O IP such as PCIe/CXL subsystems in pre- and post-silicon phases. Build scalable performance tests to measure silicon performance parameters such as timing, frequency and voltage margins. Develop system-level workloads and test programs that include realistic application stress, volume system test suites to identify problem areas, coverage gaps, yield limiters, and reliability risks; drive root-cause analysis and corrective actions. Apply statistical analysis methods (e.g., DOE, distribution analysis, outlier detection) to characterize robustness across operating conditions (voltage/temperature), workloads, and volume. Drive failure triage and root-cause analysis; partner with processor/memory/IP design, firmware, OS/driver, validation, product engineering, and manufacturing teams to resolve issues and prevent field escapes. Lead improvements to test architecture, data collection automation frameworks, version management and documentation quality. PREFERRED EXPERIENCE: Experience in SoC/IP validation, characterization, or test (or equivalent depth) with proven technical leadership and cross-functional influence. Strong understanding of testing embedded processor systems (e.g., x86, ARM, RISC-V), coherent interconnects, memory subsystems, and multi-core systems. Hands-on with pre- and post-silicon environments: simulation, emulation/FPGA prototyping, bring-up on silicon boards, and system-level debug. Proficiency in scripting languages such as Python (preferred), Tcl or Perl, building robust automation frameworks. Strong embedded C/C++ fundamentals with experience integrating firmware and test harnesses familiarity. Assembly (x86, ARM or RISC-V) and embedded Linux skills are a plus. Knowledge of coherent fabric and interconnect protocols, memory subsystems (DDR/LPDDR, cache hierarchies) and PCIe, CXL is beneficial. Applied statistical analysis for experimental data at volume. Comfort with DOE, confidence intervals, outlier detection, and visualization. Experience with version control (e.g. git), issue tracking (e.g., Jira), and disciplined documentation practices. ACADEMIC CREDENTIALS: BS in EE, CS, ECE or related field; MS preferred LOCATION: Singapore #LI-CC6 #LI-HYBRID #LI-DNI Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

Responsibilities

The role involves owning the strategy and methodology for stress test workloads across various processor subsystems and IPs, and building scalable performance tests to measure silicon parameters like timing, frequency, and voltage margins. Responsibilities also include developing system-level workloads for stress testing, driving root-cause analysis, and leading improvements to test architecture and automation frameworks.