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STAFF Verification Engineer at onsemi
Limerick, Munster, Ireland -
Full Time

Start Date

Immediate

Expiry Date

12 May, 26

Salary

0.0

Posted On

11 Feb, 26

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

SystemVerilog, UVM, Assertion-Based Verification, Debugging, Functional Coverage, Scripting Languages, TCL, CSH, Python, Analog IC Architectures, Mixed-Signal IC Architectures, Co-Verification, Jama, Jira, Multiphase Switching Regulators

Industry

Semiconductor Manufacturing

Description
ONSEMI’s Power Management Division is hiring a Staff Verification Engineer with solid experience in both top‑level and block‑level verification of integrated circuits using SystemVerilog, UVM, and assertion‑based verification. The ideal candidate is capable of working effectively in a global team environment, extracting hardware and firmware design information from specifications, and creating comprehensive verification plans that maximize functional and code coverage targets. onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world. More details about our company benefits can be found here: https://www.onsemi.com/careers/career-benefits We are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.
Responsibilities
The Staff Verification Engineer will be responsible for top-level and block-level verification of integrated circuits. This includes creating comprehensive verification plans and maximizing functional and code coverage targets.