Start Date
Immediate
Expiry Date
04 Feb, 26
Salary
0.0
Posted On
06 Nov, 25
Experience
5 year(s) or above
Remote Job
Yes
Telecommute
Yes
Sponsor Visa
No
Skills
Verification Engineer, UVM, System Verilog, Debugging, Python, Perl, Shell, Tcl, Digital Design, CMOS VLSI, Memory Circuits, Functional Coverage, RTL Simulation, Automation, Problem Solving, Communication
Industry
Semiconductor Manufacturing