Start Date
Immediate
Expiry Date
23 May, 26
Salary
0.0
Posted On
22 Feb, 26
Experience
5 year(s) or above
Remote Job
Yes
Telecommute
Yes
Sponsor Visa
No
Skills
SystemVerilog, UVM, C/C++, Python, Perl, DDR5, LPDDR5, LPDDR6, DFI, Verification Plan Development, RTL Comprehension, Micro-architecture Understanding, Functional Coverage Modeling, VIP Development, BFM Development, SystemVerilog Assertions
Industry
Semiconductor Manufacturing