Summer Trainee, Digital ASIC Design

at  murata finland

Are you passionate about designing mixed-mode integrated circuits? Do you want to dive into the world of digital ASIC design, Verilog RTL coding and gain hands-on experience in simulations? If so, we invite you to join our dynamic ASIC Design team at Murata for summer 2025!

ABOUT THE ROLE:

We are looking for an enthusiastic summer trainee to help develop innovative signal conditioning solutions at our Vantaa office. As part of the ASIC Design team, you’ll have the chance to immerse yourself in real-world projects aimed at sensor mass production. Under the mentorship of our experienced ASIC design engineers, you’ll learn how to utilize state-of-the-art simulation tools while actively contributing to exciting new product developments. At Murata, we value accuracy, creativity, and a proactive approach.

In this role, you will:

• Collaborate with a talented team on cutting-edge ASIC designs for novel sensor products.
• Gain valuable insights into circuit operation principles and different simulation tools tailored for high-quality products.
• Document your findings and present results as part of your learning journey.
• Enjoy flexible working arrangements with partial remote work options available!

To thrive in digital role, we expect candidates to have:

• A relevant technical educational background from university (with emphasis on digital microelectronics).
• Hardware description languages: SystemVerilog (Verilog).
• Proficiency in digital RTL simulation tools.
• Fluent communication skills in Finnish or English.
• Understanding of basic of Digital Signal Processing (DSP), like digital filtering theory.
• Python or C/C++ languages, Matlab or Simulink experience are considered an advantage.
• Courses in Artificial intelligence (AI) are considered an advantage