SW QA Advanced Engineer at LATTICE SEMICONDUCTOR CORPORATION

, Penang, Malaysia -

Full Time

Start Date

Immediate

Expiry Date

22 Feb, 26

Salary

0.0

Posted On

24 Nov, 25

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Software Testing, Quality Assurance, IP Block Verification, Verilog, System Verilog, VHDL, UVM, Simulation Tools, Verification Tools, FPGA Architecture, SERDES, DDR, GUI Testing, Test Plans, Test Cases, Performance Verification

Industry

Semiconductor Manufacturing

Description

Lattice Overview There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality. Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for. Responsibilities & Skills We are looking for a highly skilled and experienced Software QA Test Engineer to join our dynamic team. The ideal candidate will possess a robust background in validating software tools along with proficiency in Verilog, System Verilog and VHDL. You will play a pivotal role in the verification in our software tools and foundation IP using cutting edge methodologies and tools. Key Responsibilities 1. Help validate FPGA design flows, including compilation, simulation, power analysis, timing verification, and bitstream generation that are closely integrated with FPGA IP 2. Contribute to developing and maintaining test plans for FPGA IP blocks and software verification tools 3. Write and execute test cases for functional and performance verification of FPGA IP blocks 4. Participate in validating the FPGA IP catalog to ensure user-friendly and error-free interfaces. 5. Collaborate with the team to analyze coverage metrics and improve test scenarios. 6. Engage with stakeholders to understand and contribute to feature requirements. Required Qualifications 3 years of experience in software/IP testing and quality assurance with a proven track record in IP block verification. Execute test cases for functional and performance verification of FPGA IP blocks Familiarity with Verilog, System Verilog, and VHDL is important. Knowing UVM (Universal Verification Methodology) is a bonus, but not mandatory. Exposure to simulation and verification tools is valuable. Understanding FPGA architecture and features (like SERDES and DDR) is beneficial. Familiarize with GUI testing platform and tools such as Squish is a plus

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Responsibilities

The role involves validating FPGA design flows and developing test plans for FPGA IP blocks and software verification tools. The engineer will also write and execute test cases for functional and performance verification.