Technical Manager Design Verification at Advanced Micro Devices, Inc

Hyderabad, Telangana, India -

Full Time

Start Date

Immediate

Expiry Date

16 Sep, 26

Salary

0.0

Posted On

18 Jun, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Silicon Design Verification, UVM, SystemVerilog, C/C++, Processor Micro-architecture, Low Power Design, Emulation, Post-silicon Validation, Coverage Closure, Technical Leadership, Team Management, Project Prioritization, Debug Triage, RTL Design, DFT, Physical Design

Industry

Semiconductor Manufacturing

Description

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. SENIOR MANAGER SILICON DESIGN ENGINEER THE ROLE: AMD seeks a passionate, collaborative leader with strong technical skills and the initiative to motivate an expert team. You will manage a Silicon Engineering group and innovate with internal teams and external partners to create the next generation of computing technologies. THE PERSON: The ideal candidate has experience leading others in technical and managerial settings. You also have excellent communication, writing, and presentation skills. KEY RESPONSIBILITIES: Handle a team of engineers while understanding the technical nuances of the job. Responsible for leading the team with technical guidance as well as well as handling managerial aspects. Should be able to build and groom the team into new functional areas aligned with leadership plans. Drive innovation across the execution areas to help improve the efficiency of the team. Drive the team for participation in paper publishing into internal and external tech conferences. Help in patent harvesting. Deliver to project milestones by working in parallel across multiple programs based on the organization requirements. Prioritization of the tasks to support the dynamic requirements of the deliverables. Status roll up for a transparent communication of the status and trends. Create mitigation plans and alternate proposals when required by understanding the criticality of the issues and priority of the deliverables. Interfacing with customer, both internal and external, to ensure continuous engagement for the planning and delivery of through the execution. Should be able to handle the escalations and prepare for executive reviews. Involves having a deep understanding of processor micro-architecture, low power design and verification techniques, debug triage of failures from simulation and emulation environment for CORE or sub level regressions. Strong execution hands on experience on working with testbench creation from scratch using industry standard methodology (eg. UVM) and flows. Should be able to scale the design verification using new design methodology and techniques. Effectively collaborate and communicate across disciplines and geographically spaced teams. Collaborate with design/RTL, DFT, PD domains for smooth execution. Need to actively plan for the parallel execution of multiple programs and maneuver through the ever-changing landscape of project requirements which are at times driven by the market dynamics. Working experience with SOC teams will be an advantage. PREFERRED EXPERIENCE: Strong understanding the design and verification life cycle. Hands on verification experience with C/C++/SystemVerilog testbench development. Hands on experience with coverage planning, coding and coverage closure. Experience with x86, ARM or any other industry standard microprocessor ISA. Experience with Cache, Coherency and Data-Consistency verification. Experience in clocking, reset, power-up sequences and power management verification. Understanding of low power design verification techniques is a plus. Lead verification team from all aspects of the deliverables. Mentor the junior members of the verification team to meet the team goals Represents AMD to the outside technical community, partners and vendors Collaborate with SOC team, multi-geographical design teams for alignment of features/scoping/problem-solving. Highly motivated to seek out solutions and willing to learn new skills to fulfill job requirements; Proven interpersonal skills, leadership and teamwork; Excellent writing skills in the English language, and good organizational skills required; Skilled at prioritization and multi-tasking; Good understanding of engineering terminology used within the semiconductor industry; Good understanding of digital design concepts; Knowledge of, or experience in, functional design/RTL and physical design flow is highly desired. Experience with Emulation, post-silicon validation and debug. Experience with industry standard verification methodologies UVM. ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering #LI-BM2 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

Responsibilities

Lead a Silicon Engineering group by providing technical guidance and managing the design verification lifecycle for next-generation computing technologies. Drive innovation, manage project milestones, and collaborate across multi-geographical teams to ensure successful delivery of processor components.