Technical Staff Engineer - AMS Verification at Microchip Technology Inc.

Chandler, Arizona, United States -

Full Time

Start Date

Immediate

Expiry Date

13 Sep, 26

Salary

0.0

Posted On

15 Jun, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

AMS Verification, Power Integrity, Signal Integrity, SPICE Simulation, Chiplet Architecture, Cadence Virtuoso, Cadence Spectre, AMS Designer, Questa ADMS, Symphony, HSPICE, Silicon Debug, SoC Design, Multi-die Integration, Cross-node Integration, Electrical Specifications

Industry

Semiconductor Manufacturing

Description

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! Job Description: The successful candidate will be responsible for system-level Analog Mixed-Signal (AMS) verification and Power Integrity (PI/SI) for next-generation SoCs and chiplet-based platforms, integrating analog IP in mature nodes with advanced digital nodes (e.g., 12nm and beyond). Key Responsibilities Lead/contribute to sub-system and chip-level AMS and SPICE simulations for complex SoCs and multi-die (chiplet) architectures Drive AMS verification across chiplet boundaries, including cross-node integration (mature analog + 12nm digital) Collaborate closely with SoC design, architecture, analog, and advanced-node digital implementation teams Review and understand SoC specifications, IO subsystems, and die-to-die interface requirements Plan and execute AMS/SPICE simulation strategies, including full-chip and chiplet-level verification. Perform PI/SI simulations covering: Die pad ring Package and interposer (chiplet-based designs) PCB interfaces (as applicable) Analyze power integrity and signal integrity across chiplet interfaces and multiple power domains Develop and enhance AMS and PI/SI methodologies and flows for multi-die/chiplet systems Partner with validation teams on silicon bring-up, debug, and simulation-to-silicon correlation Requirements/Qualifications: Bachelor’s/Master’s degree in electrical engineering or equivalent with 14+ years of experience. Proven experience in AMS verification for advanced SoCs, including exposure to 12nm nodes or beyond Solid understanding of cross-domain interactions and multi-voltage/power domains Hands-on experience with industry-standard tools: Cadence (Virtuoso, Spectre, AMS Designer) Questa ADMS / Symphony HSPICE or equivalent Experience in silicon debug and correlation of simulation results with silicon behavior Ability to analyze and interpret chip-level electrical specifications and IO requirements. Strong communication skills with the ability to work effectively in a global, cross-functional environment Preferred Experience with chiplet architectures or multi-die system integration Exposure to die-to-die interfaces and advanced node (12nm and beyond) integration challenges Experience in circuit-level debug and modeling Travel Time: 0% - 25% Physical Attributes: Hearing, Seeing, Talking, Works Alone, Works Around Others Physical Requirements: 90% Sitting, 10% Standing/Walking Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law. For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster. To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes. At Microchip, employees are our greatest strength. As one of the top performing semiconductor companies in the world, we are led by a set of guiding values and a mission to empower innovation to enhance the human experience. We work tirelessly to create a company culture that highlights how important every employee is to our mission. Microchip Recruitment Privacy Notice Recruitment Scam Alert Microchip will never: Request banking or payment information during the application or interview process. Ask candidates to register or pay for a training class as part of the application or interview process. Ask candidates to receive or ship packages or goods as part of the recruitment process. Use email address not ending with "@microchip.com". Use instant messaging to communicate. Be wary of generic emails or vague job details. If something feels suspicious, stop communicating immediately. To report potential scams, contact us at HR.Compliance@microchip.com.

Responsibilities

Lead system-level Analog Mixed-Signal verification and Power/Signal Integrity for next-generation SoCs and chiplet-based platforms. Collaborate with cross-functional teams to execute simulation strategies and correlate results with silicon behavior during bring-up.