Technologist, ASIC Development Engineering (Design Lead - High-speed IO) at Sandisk

Bengaluru, karnataka, India -

Full Time

Start Date

Immediate

Expiry Date

21 Apr, 26

Salary

0.0

Posted On

21 Jan, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

ASIC Development, High-Speed IO, Architecture, Silicon Debug, Timing Budget Analysis, SERDES, Equalization Schemes, ESD Circuits Design, Mixed-Mode Simulation, Analog/Digital Co-Simulation, CMOS Process, FINFET Technologies, Mentoring, Documentation, Presentation Skills

Industry

Semiconductor Manufacturing

Description

Company Description Company Profile: SanDisk Corporation is a leading flash storage company with a diverse portfolio of covering consumer, client and enterprise solutions. Deployed by the largest and most prominent organizations worldwide, SanDisk solutions are everywhere, touching lives and enabling great value from the data they possess. Innovating at the Boundaries of Technology: Whether in your pocket, home, car, or the cloud, it’s likely SanDIsk is with you every step of the way. It's a responsibility we don't take lightly. That's why we are always at the cusp of innovation, pushing the boundaries of technology to make what you thought was once impossible, possible. We deliver the possibilities of data. YOU define what’s possible. The next big thing in data is you! Shape the future & define what's possible. Come shape the future with us. For more information about us, please visit us at www.sandisk.com Job Description Will be part of team responsible for IO and high speed interface solutions for next generation SOCs in advanced CMOS technology nodes. Will architect IO and high speed interface solutions for SanDisk ASIC controllers. Will interact with cross-functional teams to define requirements/specs, conceive the optimal solution by evaluating architectures, drive implementation, closely work with layout designers in guiding and reviewing the layouts, ensure timely and high-quality deliverables, extend SOC integration support and review and provide support for post-TapeOut activities such as Silicon characterization . Provide good technical leadership in problem solving, planning and mentoring junior engineers. Propose innovative design solutions and design methodologies. Help in building a team and developing processes. Qualifications Must have • Bachelors/Masters degree in Electronics & Telecommunication/Electrical engineering • Working experience (10+ years) in IO including 3-5 years as project leaders • Should have architected and lead high speed interface design solutions from specification through Silicon debug and characterization • Should have hands-on experience in TX and RX design architectures for high speed applications such as DDR4/DDR5/HBM/UCIe along with timing budget analysis. • Should be experienced in high speed design architectures such as SERDES, Equalization schemes • Should have hands-on experience in IPs such as SSTL, LVDS, I2C, POD IOs, PVT calibration, HV tolerant and Fail-safe IOs, Crystal oscillator etc • Should have extensive experience in ESD circuits design, Associated ESD guidelines and recommendations in different process nodes, IO and SOC level ESD review and signoff • Experience in full custom high speed data path design such as DDR/HBM/UCIe PHY will be of advantage. • Conversant with tools such as Cadence Virtuoso/Synopsys custom compiler/Hspice/Spectre/Finesim including statistical simulation methodologies • Experience in Mixed-mode simulation and analog/digital co-simulation will be of added advantage. • Experience in creating EDA model such as Verilog model, Liberty etc will be of added advantage. •Should have deep understanding and working knowledge of CMOS process including FINFET technologies such as 16nm and the associated DSM issues. • Very analytical in nature and able to work in a multi-disciplinary environment • Creative, out-of-the-box thinker with a high level of personal involvement • Strong theoretical background with a pragmatic approach. •Good verbal and written communication skills and experience working with different geographies. • Good mentoring, documentation and presentation skills Additional Information SanDisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. SanDIsk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at staffingsupport@sandisk.com to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying. Job Type (exemption status): Exempt position - Please see related compensation & benefits details below Business Function: ASIC Development Engineering Work Location: Bangalore PTP Office (IBP)--LOC_WDT_IBP

Responsibilities

The role involves architecting IO and high-speed interface solutions for next-generation SOCs and interacting with cross-functional teams to define requirements and drive implementation. The candidate will also provide technical leadership and mentor junior engineers.