Technologist , ASIC Development Engineering (Emulation Engineer, Zebu or Pa at Sandisk

Bengaluru, karnataka, India -

Full Time

Start Date

Immediate

Expiry Date

19 May, 26

Salary

0.0

Posted On

18 Feb, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Emulation Builds, RTL Modeling, Netlist Modeling, Palladium, Zebu, FPGA Emulation, Automation, Process Efficiencies, Workflow Optimization, Debugging, C++, Python, Perl, Shell, TCL, Linux/Unix

Industry

Semiconductor Manufacturing

Description

Company Description The ASIC emulation team is seeking highly motivated Emulation engineer to join a team of experienced engineers working on the development of advanced controller SoCs. The growing diversity of data creates an exponential number of new possibilities – for the world, our company, and you. You’ll be part of a team driving the innovations necessary to outpace new demands and challenges everywhere data lives, from sensors to mobile devices to the cloud. We’ve only started to scratch the surface of what data can do. You can help unlock its full potential. Job Description As a Technologist Emulation Engineer in the ASIC Emulation team, you will be responsible for emulation builds, sanity test suite & methodology. Providing technical leadership and expertise to define requirements for Emulation and Emulation IP development. Create emulation models from RTL / Netlist. Develop hardware collateral to be integrated with the Palladium / FPGA emulation mode. Experience in Palladium or Zebu Platforms Automation and increase process efficiencies. Collaborating cross-functionally to optimize emulation workflows and standardize methodologies. Work with extended teams to debug environment and drive cross-functional testing (Firmware, Software, Verification and Design) Triage failures with design, verification, firmware, software teams. Mentoring and guiding junior engineers, fostering a culture of collaboration, innovation and continuous improvement. Qualifications BE or MS degree in Electrical Engineering or Computer Engineering, with 15+ years of experience. Solid experience working on emulation platforms such as Veloce, Zebu, or Palladium (compilation, debug, performance, and throughput tuning) Debugging experience is a must particularly in HW/SW co-debug environments Knowledge of one or more protocols; SPI, DDR, SATA, USB, AXI, PCI, PCIe or I2C Experience developing C++, Python, Perl, Shell and TCL test content. Experience debugging failures using waveform viewers, log files and trace dumps. Skills Required: Working knowledge of Linux/Unix environment and shell scripting Excellent debugging and problem-solving skills with simulation and emulation environments. Cross-Functional Collaboration: Ability to work closely with design, validation, firmware, and physical design teams to resolve system-level issues. Strong team player, able to collaborate effectively across architecture, design, and validation teams. Additional Information Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at [email protected] to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying. Business Function: ASIC Development Engineering Work Location: Bangalore PTP Office (IBP)--LOC_WDT_IBP

Responsibilities

The role involves responsibility for emulation builds, sanity test suites, and methodology, requiring technical leadership to define requirements for Emulation and Emulation IP development. Key tasks include creating emulation models from RTL/Netlist and developing hardware collateral for Palladium/FPGA emulation modes.