Test Chip Engineering Program Manager at Apple

Cupertino, California, United States -

Full Time

Start Date

Immediate

Expiry Date

31 Jan, 26

Salary

0.0

Posted On

02 Nov, 25

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Silicon Development, Technical Issue Resolution, Analog IP Development, Digital IP Development, Project Management, Communication Skills, Multi-tasking, Crisis Management, Programming Languages, Test Chip Life Cycle, SoC Design, VLSI Design, ASIC Design, Physical Design, Technology Process Development, Leadership

Industry

Computers and Electronics Manufacturing

Description

Do you seek to contribute to innovative silicon technologies used in Apple products? Join Apple's Hardware Technologies organization and be at the forefront of developing the custom silicon that powers our groundbreaking products. As a Test Chip Engineering Program Manager, you'll drive critical silicon development schedules and lead technical issue resolution for test chips that validate our next-generation custom digital and analog IPs. This role offers a unique opportunity to work with world-class engineering teams in a collaborative environment where your contributions directly impact the performance and capabilities of future Apple devices. If you're passionate about pioneering silicon technology and thrive in a fast-paced environment where excellence is expected, we want to hear from you. DESCRIPTION As a Test Chip Program Manager within the Hardware Technologies Engineering organization, you will drive end-to-end silicon schedules and resolve technical issues to enable on-time Test Chip silicon for custom analog and digital Hard IP development and validation. This is an individual contributor role, helping manage the development process for test chips that support Hard IPs used in our next-generation Apple products. The focus of this role is on the specification and design of the Test Chip and post-silicon validation of the IPs in the Test Chip before the target SOC tapeout. In this role, you will coordinate across multiple engineering functions to ensure timely execution of test chip development milestones. Strong technical background in custom analog and/or digital IP development will allow you to succeed in this role. MINIMUM QUALIFICATIONS Bachelors degree in an engineering discipline and 3+ years of relevant experience. Proven SoC/VLSI Chip Design, ASIC Chip Design, Physical Design, Technology process development, or Analog/Digital IP design. Experience with custom Analog or Digital IP development process, tools/flows and methodologies, and Test Chip life cycle. PREFERRED QUALIFICATIONS 1+ years in Technical Program or Project Management, or Functional Management experience. Familiarity with Standard cell libraries and its schedule. Great leadership and communication skills (Executive communication). Experience working in a dynamic engineering environment, strong at multi-tasking and real-time crisis management. Expertise owning and driving project development using well-defined metrics. Driven, motivated and comfortable with fast paced schedule driven environment. Programming language experience (Python, Perl). Familiarity with project management tools (Confluence, JIRA).

Responsibilities

Drive end-to-end silicon schedules and resolve technical issues for test chips. Coordinate across multiple engineering functions to ensure timely execution of test chip development milestones.