Netherlands Electronics Eindhoven Hybrid
Join our team as an FPGA Verification Engineer! Develop UVM environments, verify complex designs, and mentor juniors. Work on innovative projects in Eindhoven. and boost your career!
About The Member Company

We are a global high-tech consultancy company with a team of entrepreneurial engineers, scientists, and digital experts from around the world. Together we form a fast-growing and proud community. We offer consultancy services to high-profile clients globally in diverse service areas, such as:

• Technology & Engineering
• Energy & Renewables
• Life sciences & Pharma
• Digital & IT

ABOUT THIS VACANCY

We are looking for a highly skilled FPGA Verification Engineer with expertise in Universal Verification Methodology (UVM) to join our advanced team in Eindhoven. In this role, you will focus on verifying complex FPGA designs, ensuring they meet rigorous performance, functionality, and reliability standards. Working alongside a multidisciplinary team, you will play a key role in ensuring the quality and robustness of our FPGA-based solutions.

Key Responsibilities:

• Develop and implement UVM-based verification environments to validate FPGA designs.
• Define verification strategies, plans, and test scenarios based on design specifications.
• Create, simulate, and debug testbenches to verify design functionality and performance.
• Perform functional, code coverage, and assertion-based verification to ensure robust designs.
• Identify, debug, and resolve design issues through simulation and detailed analysis.
• Collaborate closely with FPGA designers to understand design intent and resolve verification bottlenecks.
• Document verification methodologies, results, and lessons learned to support future projects.
• Stay informed about advancements in UVM, FPGA verification techniques, and industry best practices.
• Plan and execute verification from scratch.

• Develop and implement UVM-based verification environments to validate FPGA designs.
• Define verification strategies, plans, and test scenarios based on design specifications.
• Create, simulate, and debug testbenches to verify design functionality and performance.
• Perform functional, code coverage, and assertion-based verification to ensure robust designs.
• Identify, debug, and resolve design issues through simulation and detailed analysis.
• Collaborate closely with FPGA designers to understand design intent and resolve verification bottlenecks.
• Document verification methodologies, results, and lessons learned to support future projects.
• Stay informed about advancements in UVM, FPGA verification techniques, and industry best practices.
• Plan and execute verification from scratch