VLSI Integration Engineer at NVIDIA

Tel Aviv, Tel-Aviv District, Israel -

Full Time

Start Date

Immediate

Expiry Date

23 May, 26

Salary

0.0

Posted On

22 Feb, 26

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

RTL Design, System-Verilog, Python, Bash, Tcl, SOC Design Automation, Chip Build, Assembly, Padring Design, Verification, Functional Debug, Physical Design Readiness, Emulation, CDC, RDC, Trial Synthesis

Industry

Computer Hardware Manufacturing

Description

The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. The NVIDIA System-On-Chip design group (SOCD) is looking for a top ASIC Engineer with a curiosity about SOC design automation, RTL integration, chip build and assembly, and padring design and verification. You should have real passion for methodologies and automation solutions that enable SOC creation in the most optimized way. In this position, you will get the opportunity to build complex networking chips and interact directly with unit-level ASIC, Physical Design, CAD, Package Design, Software, DFT and other teams. What you'll be doing: Implement chip level design through collaboration with cross-functional teams (Functional Design, DFT, Design Verification, System Verification, STA, and Physical Design). Be exposed and work on a variety of functional and structural challenges. Including functional debug, physical design readiness, emulation, resolve design quality issues. Daily work involves aspects of chip level design, including partitioning, CDC, RDC, trial synthesis, design quality checks Taking part in flows development and deployment What we need to see: B.SC./ M.SC. in Electrical Engineering/Computer Engineering 2+ years proven experience in chip design Solid hands-on RTL design skills in System-Verilog Proficiency in at least one scripting languages like python, bash, tcl. Great teammate Way to stand out from the crowd: Passion for quality. Experience with delivery to physical design, emulation, firmware and other customers NVIDIA has some of the most forward-thinking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best physical design team in the industry! #LI-Hybrid NVIDIA is the world leader in accelerated computing. NVIDIA pioneered accelerated computing to tackle challenges no one else can solve. Our work in AI and digital twins is transforming the world's largest industries and profoundly impacting society. Learn more about NVIDIA.

Responsibilities

The engineer will implement chip-level design by collaborating with cross-functional teams, focusing on functional debug, physical design readiness, emulation, and resolving design quality issues. Daily tasks involve aspects of chip-level design including partitioning, CDC, RDC, trial synthesis, design quality checks, and participating in flow development and deployment.