Wireless Design Verification Engineer at Apple

Sunnyvale, California, United States -

Full Time

Start Date

Immediate

Expiry Date

01 May, 26

Salary

0.0

Posted On

31 Jan, 26

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Wireless Technology, ASIC Verification, SystemVerilog, UVM, Testbench Development, Simulation, Constrained Random Testing, Coverage Analysis, RTL Simulations, Data Analysis, Scripting Languages, Collaboration, Debugging, Regression Testing, Feature Closure

Industry

Computers and Electronics Manufacturing

Description

Apple's growing wireless silicon development team is responsible for the next generation of wireless silicon! In this role you will be responsible for ASIC pre-silicon verification of our extremely high throughput and low power Wireless Physical Layer. You will verify complex phy technology and protocols by developing advanced testbenches and infrastructure, applying systems models, planning and executing testing, performing data analysis, root causing issues, and driving feature closure. Join the heart of driving the next generation of wireless technology connecting the world! DESCRIPTION As a Wireless Verification Engineer, you will be at the core of our wireless product's success, bridging domains, driving collaborations, and developing verification solutions to ensure excellent products. In this role you will take on verification of controllers, blocks, subsystems, protocols, low power capabilities, and SOC / integration frameworks. You will leverage and develop environments, infrastructures, create scenarios, and analyze metrics. Responsibilities include: •Develop feature or subsystem test planning, bring up, through feature closure. •Develop testbench environment, infrastructure, methodology, and flow automation development. •Cross functional partnership, driving verification requirement and deliverable. •Develop constrained randomization scenario development and debug. •Develop regression issue tracking and closure. •Develop data analysis metric development and utilization for extensive regression and coverage data. MINIMUM QUALIFICATIONS BS + 3 years of experience PREFERRED QUALIFICATIONS Experience verifying ASICs or complex IP. Knowledge of ASIC verification flows with SystemVerilog and UVM. Experience developing testbenches environments or components, bringing up designs in simulation. Knowledge with constrained random testing, coverage analysis, and RTL simulations. Exposure to a scripting language such as Python, Perl, Bash or similar. Great teammate with excellent communication skills and the desire to seek diverse challenges.

Responsibilities

As a Wireless Verification Engineer, you will be responsible for ASIC pre-silicon verification of high throughput and low power Wireless Physical Layer. You will develop advanced testbenches and infrastructure, apply systems models, and drive feature closure.