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Wireless MAC Design Engineer at Apple
Sunnyvale, California, United States -
Full Time

Start Date

Immediate

Expiry Date

03 Jun, 26

Salary

0.0

Posted On

05 Mar, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

Wireless Mac Design, SoC Design, Microarchitecture, RTL Design, Verilog, SystemVerilog, Lint, CDC, RDC, STA, LEC, Timing Closure, Digital Logic Design, ASIC Design, Low Power Design, Wireless Standards

Industry

Computers and Electronics Manufacturing

Description
Come join Apple’s wireless silicon development effort, with its emphasis on highly energy-efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically coordinated engineering team. DESCRIPTION Develop MAC layer design for wireless communication SoCs, including creating microarchitecture and other documents based on system-level requirements, and writing area- and power-efficient RTL that is scalable. Work with systems and software teams to ensure performance and power efficiency. Collaborate with verification and emulation teams on debug, test plan review and code coverage closure. Run tools to ensure lint and CDC/RDC clean design. Work with synthesis team to review constraints, close timing and review area/timing reports. MINIMUM QUALIFICATIONS BS in Electrical Engineering, Computer Engineering, or a related field, and 10+ years of relevant industry experience. Digital logic design fundamentals. Demonstrated experience in translating functional requirements into synthesizable Verilog or SystemVerilog RTL. Knowledge of digital design flows such as RTL simulation and debug, synthesis, lint, STA, and LEC. Ability to design multi-clock-domain logic and resolve CDC problems. PREFERRED QUALIFICATIONS 10+ years of experience in ASIC microarchitecture and RTL design. Excellent organization skills. Excellent communication skills – both written and oral. Understanding wireless standards, such as IEEE 802.11, 802.15, Bluetooth or 3GPP. Understanding of ASIC low power design techniques, e.g. multiple supply domains configuration and management, dynamic power/clock scaling and power analysis is a plus.
Responsibilities
The engineer will develop MAC layer designs for wireless communication SoCs, which involves creating microarchitecture documents and writing area- and power-efficient RTL based on system requirements. Responsibilities also include collaborating with systems, software, verification, and emulation teams to ensure performance, power efficiency, and closure on debug and coverage.