Wireless SoC Design Engineer at Apple

San Diego, California, United States -

Full Time

Start Date

Immediate

Expiry Date

13 Jan, 26

Salary

0.0

Posted On

15 Oct, 25

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

SoC Design, RTL Development, Digital Design, ASIC Design Flow, Verilog, Low-Power Design, EDA Tools, AXI/AHB Bus Fabric, Microarchitecture, Power Optimization, Timing Analysis, Collaboration, Integration, Validation, Testing, Self-Starter

Industry

Computers and Electronics Manufacturing

Description

Come and join Apple’s growing wireless silicon development team. Our wireless SoC organization is responsible for all aspects of wireless silicon development, emphasizing highly energy-efficient design and new technologies that transform the user experience at the product level. All of this is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. If you enjoy a fast-paced and challenging environment, collaborate with people across different functional areas, and thrive during aggressive schedules, we encourage you to apply. DESCRIPTION As a SoC Design engineer, you will have responsibilities spanning all aspects of SoC: • Work with leads and architecture team to define the design microarchitecture. • Develop RTL design of one or more blocks following established design guidelines based on microarchitecture spec. • Own all aspects of RTL development design. • Work and collaborate with other designers in the group to deliver results Integrate common/shared IP blocks and optimize memories/hard macros required for the block. • Complete front-end synthesis/STA to ensure timing for the block is met. • Optimize power/performance. • Collaborate with multi-disciplinary groups to make sure designs are delivered on time and with the highest quality by incorporating proper checks at every stage of the design process. MINIMUM QUALIFICATIONS BS with 3+ years relevant experience. Familiarity with the ASIC design flow. Knowledge of digital design, SoC architecture, and HDL languages like Verilog. PREFERRED QUALIFICATIONS Exposure to design methodologies and industry standard EDA tools. Experience with AXI/AHB bus fabric and processor sub-systems. Understanding of UPF and low-power design & implementation techniques is a plus. Self-starter and willingness to learn.

Responsibilities

As a SoC Design Engineer, you will define the design microarchitecture and develop RTL design of various blocks. You will collaborate with other designers to ensure timely delivery and high-quality results.