Wireless SoC Design Engineer at Apple

San Diego, California, United States -

Full Time

Start Date

Immediate

Expiry Date

28 Jan, 26

Salary

0.0

Posted On

30 Oct, 25

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Wireless SoC Design, ASIC Design Flow, Digital Design, SoC Architecture, HDL Languages, Verilog, Micro-Architecture Specifications, Design Methodologies, EDA Tools, AXI Bus Fabric, AHB Bus Fabric, Processor Sub-Systems, UPF, Low-Power Design, Self-Starter, Learning

Industry

Computers and Electronics Manufacturing

Description

Come and join Apple’s growing wireless silicon development team. Our wireless SoC organization is responsible for all aspects of wireless silicon development, emphasizing highly energy-efficient design and new technologies that transform the user experience at the product level. All of this is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. If you enjoy a fast-paced and challenging environment, collaborate with people across different functional areas, and thrive during crisis times, we encourage you to apply. DESCRIPTION In this role you will work on a small team designing CPU-based subsystems for high performance, low power wireless SoCs. As a member of the team, you will work closely with SoC architects and IP developers to develop SoCs that meet the power, performance, and area goals for Apple devices, with a particular focus on low power metrics. You will engage in hardware/software/power partitioning discussions alongside software, firmware, and platform engineering teams. You will integrate industry standard and custom hardware IPs into SoCs. This is a highly visible role, where you will be at the center of the ASIC design efforts, collaborating with all fields, with a critical impact in getting leading-edge products launched to delight millions of customers. MINIMUM QUALIFICATIONS BS with 3+ years relevant experience. Familiarity with the ASIC design flow. Knowledge of digital design, SoC architecture, and HDL languages like Verilog. PREFERRED QUALIFICATIONS Shown experience writing micro-architecture specifications and converting them to design Exposure to design methodologies and industry standard EDA tools. Experience with AXI/AHB bus fabric and processor sub-systems. Understanding of UPF and low-power design & implementation techniques. Self-starter and willingness to learn.

Responsibilities

Design CPU-based subsystems for high performance, low power wireless SoCs. Collaborate with SoC architects and IP developers to meet power, performance, and area goals.