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Wireless SoC Design Verification Engineer at Apple

, , Israel -

Full Time

Start Date

Immediate

Expiry Date

29 Jun, 26

Salary

0.0

Posted On

31 Mar, 26

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Wireless SoC, Design Verification, RTL Verification, Testbench Development, SystemVerilog, Debugging, Constrained Random Testing, Regression Analysis, Coverage Analysis, Communication Systems, DV Methodologies, Creative Thinking, Problem Solving, Collaboration, Simulation, Architecture

Industry

Computers and Electronics Manufacturing

Description

Would you like to join Apple’s growing wireless silicon development team? Our wireless SOC organization is responsible various aspects of wireless silicon development with a particular emphasis on highly energy efficient design new technologies that impact the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team. As a Wireless Design Verification Engineer, you will be part of a team that is responsible for pre-silicon RTL verification of communication subsystems, SoC sub-systems and chip-level functionality. The activity may focus on block level, sub-system level or chip level, including end-to-end simulations of the entire data/control path. You will interact with DV methodologists, designers and communication systems engineers to develop reusable testbench and verification environment deploying the latest methodology with metric driven verification. DESCRIPTION - Own critical block and sub-system verification of wireless SoC projects - Architect and develop testbenches and environments, by using state-of-the-art verification methodologies - Define verification plan, create, simulate and debug test scenarios - Drive regression and coverage analysis to ensure high quality DV - Collaborate with design and systems engineering teams to review requirements, specifications and architecture, extract features and define DV attribute MINIMUM QUALIFICATIONS BSc or MSC in Electrical Engineering or Computer Engineering 5+ years of verification experience Solid verification skills in problem solving, constrained random testing, and debugging Advanced knowledge of SystemVerilog and DV methodologies Self-motivated and dedicated with proven creative thinking capabilities Ability to handle multiple tasks and prioritise work to meet deadlines PREFERRED QUALIFICATIONS Experience with MAC or PHY Verification - a plus

Responsibilities

Own critical block and sub-system verification of wireless SoC projects. Collaborate with design and systems engineering teams to review requirements and define DV attributes.