ABOUT THIS OPPORTUNITY

Ericsson Silicon – PEU Silicon Productization Engineering is seeking an experienced and dynamic Engineering Manager to lead a team of validation, system debug, hardware design and quality & reliability engineers.
In this role, you will take ownership of a highly specialized and functional hardware lab, and own the test equipment budgeting, procurement, and utilization of hardware lab. You should have an extensive background on test equipment used for Baseband and Radio hardware design.
As an Engineering Manager working in Silicon Productization Engineering, you will be responsible for managing a global team of engineers involved in Baseband & Radio silicon development. This role presents an exciting opportunity to contribute to achieving program goals for the final ASIC while enhancing our organization’s capabilities to maintain its leadership position in ASIC quality. If you are a results-oriented leader with a passion for driving excellence in engineering, we would love to hear from you.

What you will do

• Manage a team of validation, system debug and hardware design engineers, focusing on their career growth and competence development.
• Lead the recruitment, onboarding, and allocation of new talent to the team.
• Take ownership of handling lab and equipment budgeting, ensuring efficient resource allocation.
• Gain a comprehensive understanding of Baseband and Radio ASIC design, features, and implementation.
• Define the validation scope and empower the team to develop the post-silicon infrastructure, including test plans, tests cases, and data analysis scripts.
• Lead the implementation of test/coverage plans to ensure thorough validation and correctness of the design.
• Join forces with fellow Validation leaders to devise a strategy for validation boards for Baseband and Radio ASICs.
• Collaborate with engineering teams in Austin and Sweden at the IP, ASIC, and system levels as the design evolves.
• Lead issue prioritization and guide potential experiments leading to issue resolution.

THE SKILLS YOU BRING

• Proven experience in managing and developing a team of validation and system debug engineers.
• Strong competence in recruiting, onboarding, and allocating new talent.
• Proficiency in budgeting and resource allocation for lab and equipment needs.
• In-depth knowledge of Baseband and Radio ASIC design, features, implementation, validation, product testing, silicon qualification testing including HTOL, ESD, and Latch UP
• Familiarity with Design For Reliability methodology, and silicon fabrication process, a plus
• Proven experience leading a team to define and execute validation plans, including the development of test plans, tests, and data analysis scripts.
• Collaborative mindset and effective communication skills to work with engineering teams across different locations.
• Familiarity with high-speed oscilloscopes, logic analyzers, and data acquisition tools/hardware.
• Proficiency in the Linux/Unix Operating System
  Vetting including references and relevant background screening will be conducted for final candidates.

• Manage a team of validation, system debug and hardware design engineers, focusing on their career growth and competence development.
• Lead the recruitment, onboarding, and allocation of new talent to the team.
• Take ownership of handling lab and equipment budgeting, ensuring efficient resource allocation.
• Gain a comprehensive understanding of Baseband and Radio ASIC design, features, and implementation.
• Define the validation scope and empower the team to develop the post-silicon infrastructure, including test plans, tests cases, and data analysis scripts.
• Lead the implementation of test/coverage plans to ensure thorough validation and correctness of the design.
• Join forces with fellow Validation leaders to devise a strategy for validation boards for Baseband and Radio ASICs.
• Collaborate with engineering teams in Austin and Sweden at the IP, ASIC, and system levels as the design evolves.
• Lead issue prioritization and guide potential experiments leading to issue resolution