Lead DFT Engineer
at Untether AI
Toronto, ON, Canada -
Start Date | Expiry Date | Salary | Posted On | Experience | Skills | Telecommute | Sponsor Visa |
---|---|---|---|---|---|---|---|
Immediate | 24 Dec, 2024 | Not Specified | 25 Sep, 2024 | 7 year(s) or above | Dft,Critical Environments | No | No |
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Description:
PLEASE NOTE: WHILE OUR ENGINEERING HQ IS IN TORONTO, THIS IS A REMOTE OPPORTUNITY AND WE WELCOME APPLICANTS FROM ANYWHERE IN NORTH AMERICA.
We’re looking for best in class engineers to join our existing top-notch team. When you join Untether AI, you will be part of the team that creates innovative hardware and delivers industry leading AI performance and efficiency. Utilizing non Von Neumann techniques, you will help propel sustainable AI inference.
As part of this talented team of engineers, you are able to - and are excited to - architect, implement, verify and productize custom hardware designs. Being on our team means collaborating with an extremely bright group of people while tackling tough and interesting problems at the intersection of AI and hardware.
To help grow our organization, we are looking for a Lead Design For Test (DFT) Engineer to collaborate with a bright group of engineers to tackle complex and interesting problems at the intersection of AI and hardware. The DFT Engineer will be a hands-on architect and engineer who understands the why, not just the how. Help us choose and implement the right techniques to meet the high quality standards of data center, automotive and similar industries. The ideal candidate has hands-on experience both at the block level and full chip level.
PREFERRED SKILLS & EXPERIENCE
- 7+ years of professional experience, focused on DFT
- Bachelor’s degree in Electrical Engineering or similar discipline
- Graduate level educational experience focusing on DFT is valued but not required
- Experience implementing DFT, as well as driving external DFT contractors
- Hands on experience implementing Scan and MBIST in multiple designs
- Expert understanding of the strengths and weaknesses of DFT techniques, and how to model and measure the benefit of a particular technique
- Cutting edge understanding of common silicon defects and how to detect them in the latest technology nodes
- Experience with advanced packaging (CoWoS, EMIB, die stacking, etc.)
- Experience designing for safety critical environments (healthcare, automotive, etc.)
- Experience designing for data center applications
Responsibilities:
- Help determine which DFT techniques to implement, and where to implement them
- Scan, MBIST, LBIST, DFT in RTL, Fault Grading of Functional Tests, etc.
- Use quantitative analysis to drive decisions.
- Own the implementation of all DFT features
- Determine which techniques/features to do ourselves, and which to outsource
- Drive vendors and QA their work
- Contribute to selection of CAD tools
- Implement DFT features (Scan, MBIST, etc) on portions of the design
- Work with the functional design team to understand the architecture
- Work with product teams to understand quality and reliability needs
- Work with product operations teams to hand off the design to ATE
- Ensure DFT features are used effectively in silicon
- The role is not just to use the tools to insert scan chains, or to report scan and test coverage. The role is to provide cutting edge, quantitative DFT expertise.
REQUIREMENT SUMMARY
Min:7.0Max:12.0 year(s)
Information Technology/IT
Engineering Design / R&D
Software Engineering
Graduate
Electrical engineering or similar discipline
Proficient
1
Toronto, ON, Canada