Accelerator NOC Logic Design Engineer

at  Rivos

The accelerator team is looking for talented Micro-Architects and RTL Designers with expertise in Network on Chip (NoC) and hands-on design experience to join a cutting-edge and well-funded hardware startup. Our mission is to reimagine silicon and create Risc-V based computing platforms that will transform the industry. You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. We offer a fun, creative and flexible work environment, with a shared vision to build products to change the world.

REQUIREMENTS

• Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated.
• Ability to work well in a team and be productive under aggressive schedules
• 2-5 years of experience in Micro-Architecture and RTL design with in-depth knowledge of System Verilog.
• Proficiency in high-bandwidth Network on Chip (NoC) architecture, design and implementation.
• Strong RTL coding experience in System Verilog and assertions.
• Experience with EDA tools for synthesis, simulation, and verification.

EDUCATION AND EXPERIENCE

• PhD, Master’s Degree or Bachelor’s Degree in technical subject area.
• 2 to 5 years of Design experience in NOC related microarchitecture and RTL design

• Own or participate in the architecture, design, and implementation of NoC in the accelerator
• Collaborate with cross-functional teams to ensure successful integration and functionality
• Work with performance team on performance analysis and optimization
• Work closely with architecture and verification engineers on developing verification plan, checkers, and coverage monitors to verify the functional correctness of the design
• Contribute to the development of logic design methodologies and best practices