Analog/mixed-signal IC Design - Technical Lead - Acacia

at  Cisco Systems

Ottawa, ON, Canada -

Start DateExpiry DateSalaryPosted OnExperienceSkillsTelecommuteSponsor Visa
Immediate17 Dec, 2024Not Specified18 Sep, 20243 year(s) or aboveConstruction,Inductors,Design,Virtuoso,Component Design,Transmission Lines,Test Equipment,Characterization,CadenceNoNo
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Description:

Application window is expected to close on 9/30/24
Acacia designs intelligent transceivers using advanced signal processing and photonic integration for the 100G, 400G and 1T bit speed fiber optic transmission market deployed in data center, metro, long-haul and ultra-long haul telecommunication networks.

MINIMUM QUALIFICATIONS:BSEE DEGREE WITH 8+ YEARS OF EXPERIENCE, OR EQUIVALENT, AN MS DEGREE WITH 6+ YEARS OF EXPERIENCE, OR EQUIVALENT, OR A PHD WITH 3+ YEARS OF EXPERIENCE, OR EQUIVALENT.

Design, simulation and measurement of high speed ICs in at least 3 areas below:

  • High Speed Serial Links utilizing serializers, deserializers, and data convertors.
  • Voltage Regulators
  • High Performance Output Drivers
  • High Performance Phase Locked Loops
  • Efficient clock Transmission/propagation
  • Opamps and Programmable Gain Amplifiers
  • Equalization techniques

PREFERRED QUALIFICATIONS:

  • Direct experience with electrical transceiver applications including backplane and cable communications
  • Experience with FinFET technology

-High-frequency layout experience a plus: Passive component design: inductors, -transformers, transmission-lines, etc.

  • Floorplanning (power/ground, digital/analog signal routing, etc.)
  • Custom transistor layout

Design for manufacturability:

  • Characterization over PVT (monte-carlo analysis)
  • Electromigration analysis (using Totem, or equivalent)
  • Power and IR drop analysis

Laboratory Validation:

  • Solid ESD laboratory practices and methodology
  • Construction of test setup to test specific circuitry

Software Experience:

  • Experience in the use of high frequency test equipment (BERT, jitter analyzers, VNA/PNA, etc.)
  • Cadence (virtuoso)
  • Spectre/APS/SpectreX
  • Layout validation tools (Virtuoso or Calibre)
  • Post-layout Extraction (Virtuoso or Calibre)

Responsibilities:

  • As a member of the Mixed Signal Design team, you will be a key member of a small, dynamic IC Design group that develops high speed (>25Gb/s), and high accuracy, analog designs for optical communications products. You will architect, design, layout, measure and productize ultra-deep sub-micron-based CMOS products.
  • You will lead efforts for a large block on a complex chip, mentor team members and track deliverables, participate in peer review of complex IC designs and provide solid design methodology from conception to production.
  • You will also collaborate with packaging and hardware design team to ensure signal and power integrity specifications are met.


REQUIREMENT SUMMARY

Min:3.0Max:8.0 year(s)

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Ottawa, ON, Canada