Analog Mixed-Signal IP Designer (f/m/d)

at  Apple

SUMMARY

Posted: Oct 9, 2024
Role Number:200572577
At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for an ambitious and exceptionally hardworking AMS front end integration engineer. As a member of our dynamic group, you will have the unique and rewarding opportunity to shape upcoming products that will delight and inspire millions of Apple’s customers every day. In this role, you will be involved with PHY design effort collaborating with architecture, CAD, logic design teams, with a critical impact on delivering best in class PHY designs.

DESCRIPTION

As a senior IP Design/Implementation engineer you will have responsibilities spanning all aspects of IP. You will be responsible for generating gate level netlist and various collaterals for physical design team, lint, logic equivalence check, static low power verification, Functional ECO, CDC, RDC and managing collaterals between front-end design team and physical design team.

• Preferred minimum extensive years of experience in IP design integration and implementation with multiple clock domains and multiple power domains.
• Deep knowledge and experience in various tools such as RTL simulation, lint, logic equivalence, version control, synthesis, static timing analysis, CDC, RDC in order to generate gate level netlist and perform various checks.
• Working experience with the physical design teams
• Deep knowledge of VLSI design methodology ranging from RTL to sign-off and familiarity with programming language such as Perl, Tcl, shell scripts
• The ideal candidate will be familiar with version control, CVS, Perforce, ClearCase.

• Excellent interpersonal skills and interaction experience with sub block owners, physical design teams and different engineering groupsProficiency in English language is required

PREFERRED QUALIFICATIONS

• MSEE (preferred) or BSEE, or equivalent is required
• Apple is an equal opportunity employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, perform crucial job functions, and receive other benefits and privileges of employment. Please contact us to request an accommodation.

• Preferred minimum extensive years of experience in IP design integration and implementation with multiple clock domains and multiple power domains.
• Deep knowledge and experience in various tools such as RTL simulation, lint, logic equivalence, version control, synthesis, static timing analysis, CDC, RDC in order to generate gate level netlist and perform various checks.
• Working experience with the physical design teams
• Deep knowledge of VLSI design methodology ranging from RTL to sign-off and familiarity with programming language such as Perl, Tcl, shell scripts
• The ideal candidate will be familiar with version control, CVS, Perforce, ClearCase.
• Excellent interpersonal skills and interaction experience with sub block owners, physical design teams and different engineering groupsProficiency in English language is require