ASIC and/or FPGA Design & Verification Engineer (Lead, Senior, Principal) WA

at  Boeing

At Boeing, we innovate and collaborate to make the world a better place. From the seabed to outer space, you can contribute to work that matters with a company where diversity, equity and inclusion are shared values. We’re committed to fostering an environment for every teammate that’s welcoming, respectful and inclusive, with great opportunity for professional growth. Find your future with us.
Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification Engineers at Lead, Senior & Principal levels to join us as part of our Boeing Electronic Products team at the heart of Boeing’s products; ASICs and FPGAs in Kent or Tukwila, WA.
Our site enjoys every other Friday off a part of our 9/80 flexible schedule! We also get to enjoy 4+ weeks of paid time off and 12-14 Paid Holidays, including our Winter Break from Christmas to New Years.
Our Electronics Products team goal is to be Boeing’s sole source for electronics and have grown by over 400% with significant opportunities to support more Boeing Platforms. We seek multiple leadership level engineers who are ambitious and will thrive in a technology development environment and can work the full spectrum from research through flight insertion. We’re highly supportive of innovative thinking, we respect and acknowledge hard work, we recognize maturity and integrity, and we reward bottom-line achievement. At Boeing, we value your curiosity, your determination, and your imagination. #TheFutureIsBuiltHere
The work we do enables the missions and needs of our customers as we help Connect, Protect, Explore, and Inspire the world. Our team of engineers leverage leading-edge technology and work with world-class partners to provide some of the most complex SoCs in the world. We develop robust, high-performance custom processors using the latest ARM IP to enable high-integrity, low SWAP-C flight computers. Plus, we’re applying the latest digital IC design processes with industry-best tools to enable applications that cut across every domain at Boeing.
Our diverse development portfolio provides opportunities to learn with exposure to the breadth of the Boeing product line – approximately half our design work is within the Space & Launch business unit, and half is from other parts of Boeing (AvionX; Missiles & Weapons; Strike, Surveillance and Mobility; and Autonomous Systems).
As an ASIC/FPGA Engineer on the Boeing Electronic Products team you will lead a growing team and develop state-of-the-art digital ICs/SoCs to support the most critical programs across the Boeing Defense and Security enterprise. We collaborate with other electronics groups across the company and around the world and support ASIC/FPGA design and verification for electronics that we build in El Segundo or for units designed at other sites.

BASIC QUALIFICATIONS (REQUIRED SKILLS/EXPERIENCE)

• The ability to obtain a U.S. Security Clearance for which the U.S. Government requires U.S. Citizenship.
• Bachelors degree in engineering, computer science, or physics
• 1 or more years of experience with Hardware-based integration and test of ASIC/FPGA designs
• 5 or more years of experience working with digital ASIC/FPGA design and verification
• 5 or more years of experience with ASIC development including architectural definition, and detailed design implementation and functional verification using SystemVerilog/VHDL/Verilog

PREFERRED QUALIFICATIONS (DESIRED SKILLS/EXPERIENCE)

• Proven record of leading ASIC/FPGA design and/or verification teams, including tracking and reporting progress to stakeholders
• Leading ASIC/FPGA design and/or verification teams, including tracking and reporting progress to stakeholders
• Experience with hardware emulators, especially Palladium
• Proficiency with hardware verification languages: System Verilog, System Verilog Assertions
• Proficiency with Object Oriented Programming Concepts: Inheritance, Polymorphism, etc.
• Ability to create test plans and self-checking and reusable testbenches from scratch
• Experience developing Functional Coverage Models and Closing Code Coverage
• Experience with high-speed Serdes interfaces (JESD204C, PCIe, Ethernet)
• Proficient in scripting languages: Make, Perl, Python, etc.
• Revision Control Systems: svn, cvs, git
• Proficient in Linux Environments
• Familiarity with space-based design techniques and radiation mitigation

TYPICAL EDUCATION/EXPERIENCE

Lead:
Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, computer science, mathematics, physics or chemistry (e.g. Bachelor) and typically 9 or more years’ related work experience or an equivalent combination of technical education and experience (e.g. PhD+4 years’ related work experience, Master+7 years’ related work experience). In the USA, ABET accreditation is the preferred, although not required, accreditation standard.
Senior:
Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, computer science, mathematics, physics or chemistry (e.g. Bachelor) and typically 14 or more years’ related work experience or an equivalent combination of technical education and experience (e.g. PhD+9 years’ related work experience, Master+12 years’ related work experience). In the USA, ABET accreditation is the preferred, although not required, accreditation standard.
Principal:
Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, computer science, mathematics, physics or chemistry (e.g. Bachelor) and typically 20 or more years’ related work experience or an equivalent combination of technical education and experience (e.g. PhD+15 years’ related work experience, Master+18 years’ related work experience). In the USA, ABET accreditation is the preferred, although not required, accreditation standard.

• Lead FPGA/ASIC designs, including multi-FPGA/ASIC programs and teams with design and verification engineers, and manage team execution to meet program milestones
• Collaborate with customers, system engineers, and hardware engineers to drive requirements capture and architect digital logic functions to meet mission/customer needs
• Explore trade-space of potential ASIC/FPGA technologies and determine the optimal parts, weighing Schedule, Cost, Risk, Area, Power (SCRAP) vs. performance
• Implement FPGA/ASIC with latest design practices and tools from block-level micro-architecture, through HDL coding, and physical design realization (through gate-level netlists for ASIC designs)
• Integrate DSP IP from Boeing’s algorithm team and third-party IP as needed
• Perform static timing analysis, LEC, CDC, linting, and other necessary checks to ensure the design is completed on schedule
• Develop Functional Coverage Models and perform Code Coverage to verify designs in simulation
• Create self-checking and reusable test benches from scratch, applying Object Oriented Programming concepts such as Inheritance and Polymorphism, and leverage UVM to create drivers, monitors, predictors, and scoreboards
• Drive FPGA-based prototyping and validation depending on program and system requirements and complexity
• Validate design through hardware integration test with special test equipment, test-beds, and higher-level systems as needed
• Train and mentor less senior engineers across the department and help build effective project teams