ASIC Digital Design, Architect

at  Synopsys

KEY QUALIFICATIONS

• B.SC./ M.SC. in Computer Engineering/Electrical Engineering/Communication Engineering
• Strong analytical skills and ability to work in a dynamic and fast-paced team environment.
• 10+ years of ASIC design verification, UVM-based functional verification, or related work experience.
• Team player with positive outlook and “can do” attitude.
• Ability to work autonomously and drive results and innovation.
• Proven background in technical mentorship and leading projects.
• Good written and oral communication skills.

PREFERRED EXPERIENCE

• Programming skills such as C, System Verilog, TCL Perl or Python
• Experience using formal verification tools like Jasper or VC Formal is a plus
  Our Silicon Design & Verification business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules.
  At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
  Stay Connected: Join our Talent Community

• Work with the design team to define the verification requirements.
• Develop test plans from a specification document.
• Write UVM verification test bench architecture, agents, and test sequences.
• Review test plans and verification code,
• Implement SVA for functional and formal verification.
• Implement coverage and review coverage results.