ASIC/FPGA Design & Verification Engineer I

at  Honeywell

Brno, Jihovýchod, Czech -

Start DateExpiry DateSalaryPosted OnExperienceSkillsTelecommuteSponsor Visa
Immediate17 Dec, 2024Not Specified21 Sep, 2024N/ACitizenship,Analytical Skills,Presentation SkillsNoNo
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Description:

JOIN A TEAM RECOGNIZED FOR LEADERSHIP, INNOVATION AND DIVERSITY

We have an opportunity for a Semiconductor Engineer I to join us at Honeywell, in Brno, where you will be a part of a team working on new products than span from Urban Air Mobility through Military Mission Computer to Space design. You will be responsible for coding, running simulations, synthesis, creating test benches and documentation for a design based on the most powerful FPGAs from Xilinx and/or Microchip.
You will have a mentor who will walk you through a design and verification process.
This is a hybrid role, 3 days in office, 2 from home.
Since the invention of autopilot in 1914, we’ve been a leader in innovation for the Air Travel industry. Today, thousands of Honeywell products are used in aircraft and airports around the world. Everyday 140,000 Honeywell air turbine starters bring to life commercial and military aircraft, industrial and marine equipment.

KEY SKILLS AND QUALIFICATIONS

  • University graduate with Bachelor’s/ Master’s Degree from Electrical Engineering or Computer Science faculty;
  • Relevant experience with the ASIC/FPGA development and tools;
  • Written, verbal and presentation skills that would support your ideas in English (level B2 or above)
  • Analytical skills; results-oriented; team player;
  • EU or US citizenship
    Please note that due to export restrictions, we will only be able to take into consideration applicants with an EU, UK or US citizenship.

Responsibilities:

  • ASIC/FPGA design & verification;
  • Working with HDL languages (SystemVerilog, VHDL, Verilog)
  • Working following FPGA/SOC technologies: Microchip, AMD (XILINX), Inter, etc.
  • Developing Safety/Mission critical digital systems for Avionics & Space applications per DO-254 standard;
  • Engaging with full ASIC/FPGA development process (requirement definition, design, verification, synthesis, STA, CDC, documentation)


REQUIREMENT SUMMARY

Min:N/AMax:5.0 year(s)

Electrical/Electronic Manufacturing

Engineering Design / R&D

Other

Graduate

Computer Science, Electrical, Electrical Engineering, Engineering

Proficient

1

Brno, Czech