Digital Verification Engineer

at  Ciena

Ottawa, ON, Canada -

Start DateExpiry DateSalaryPosted OnExperienceSkillsTelecommuteSponsor Visa
Immediate18 Jan, 2025USD 99400 Annual18 Oct, 2024N/AC++,Python,Object Oriented Programming,Programming Languages,Ethernet,Interpersonal Skills,C,Computer ScienceNoNo
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Description:

CIENA IS COMMITTED TO OUR PEOPLE-FIRST PHILOSOPHY. OUR TEAMS ENJOY A CULTURE FOCUSED ON PRIORITIZING A PERSONALIZED AND FLEXIBLE WORK ENVIRONMENT THAT EMPOWERS AN INDIVIDUAL’S PASSIONS, GROWTH, WELLBEING AND BELONGING. WE’RE A TECHNOLOGY COMPANY THAT LEADS WITH OUR HUMANITY—DRIVING OUR BUSINESS PRIORITIES ALONGSIDE MEANINGFUL SOCIAL, COMMUNITY, AND SOCIETAL IMPACT.

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Responsibilities:

WHAT WILL YOU DO AT CIENA AS A DIGITAL VERIFICATION ENGINEER?

The Wavelogic family of products are widely used in Ciena’s optical fiber transmission solutions, and are one of the main contributors to Ciena’s success in the telecommunications industry. To further strengthen our team, we are looking for a hardworking digital verification engineer who will be involved in the verification of these products, working within a team of digital design engineers, verification engineers and architects. Your role as a digital verification engineer will be to propose and implement innovative verification strategies, in order to thoroughly simulate and validate functional blocks and subsystems for the Wavelogic family of products.

  • As a digital verification engineer, you are encouraged to read and understand the architecture and functional requirements specification document(s) and communicate and collaborate with systems engineers and architects
  • You are held responsible for the complete and thorough validation of one or more architectural functional blocks by using an appropriate combination of simulation, formal and coverage methods
  • You are encouraged the build the verification, functional coverage and formal verification test plans
  • You are accountable for the creation of testbench environment and/or components, agents, scoreboard, and all test scenarios related to your architectural functional block using System Verilog UVM and/or C where applicable
  • You will perform coverage driven verification, formal verification, monitor regressions and debug resulting failures with the help of the function’s designer
  • Reporting status updates on a regular basis

WHAT TECHNICAL EXPERIENCE AND PERSONAL SKILLS ARE REQUIRED FOR THIS ROLE?

  • Electrical or computer engineering, computer science or other applicable scientific degree at the BEng/BSc or MEng/MSc level
  • A highly motivated self-starter, able to work independently, while being a great teammate
  • Ability to methodically tackle sophisticated technical problems
  • Excellent organization, written and oral (English) interpersonal skills
  • Familiarity with formal verification methods
  • Familiarity with standards and protocols such as OTN, B100G, Ethernet
  • Familiarity with programming languages such as: Python, Make, bash, object-oriented programming, C, C++, System C


REQUIREMENT SUMMARY

Min:N/AMax:5.0 year(s)

Information Technology/IT

Engineering Design / R&D

Information Technology

Graduate

Computer Science, Electrical, Engineering

Proficient

1

Ottawa, ON, Canada