Executive Director, Interface IP

at  Synopsys

WE ARE:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

• Ultimately responsible for delivering on time, as per committed plan-of-record, the PCIe/CXL product portfolio ensuring functional quality, physical feasibility and smooth customer experience
• Leading and managing an organization of approx. 150 R&D engineers focused on developing digital IP controllers, namely PCIe/CXL, to the product line’s plan-of-record
• Ensure that the team capacity and team structure are setup to meet market demand. With fixed resources, define the prioritization of asks with stakeholders and align an execution plan to achieve of plan of record.
• Managing cross-functional collaboration with marketing, support organizations, methodology team and MSIP PHY team to ensure aligned objectives across all stakeholders
• Adapting to methodologies and physically aware sign-off metrics as defined by methodology and physical design sign-off teams
• Manage project scope, project schedule, project resource costs and project risk. Review project convergence metrics with team, identifying risks early and mitigate against such risk. Align with management on project resource needs and trade-offs.
• Lead R&D activities as required around customer pre-sales engagements and post-sales support and escalation management