Failure Analysis and Fault Isolation (FA/FI) Engineer

at  Intel

JOB DESCRIPTION

Fab Sort Manufacturing (FSM) is responsible for the production of all Intel silicon using some of the world’s most advanced manufacturing processes in fabs in Arizona, Ireland, Israel, Oregon and a new greenfield site in Ohio.
Intel recently created HVM Global Yield organization in FSM to strengthen its yield operation and enable fast-paced yield ramp-up in early HVM phases for each technology in collaboration with Technology Development (TD) team, and FSM fabs.
This job requisition is seeking a Failure Analysis and Fault Isolation (FA/FI) Engineer working in our FSM Ireland Analytical Laboratories which operates 24/7. Selected candidate will work in a dynamic team supporting technology development and yield improvement through targeted electrical and physical failure analyses (EFA / PFA). Team will support both product and test chips, spanning from data analysis and workflow planning, sample preparation, nanoprobing, tester based and static fault isolation, report generation and customer presentation. Engineers may focus on specific modules or cover full analysis flow.

FI/FA Engineers responsibilities include (but are not limited to):

• Review incoming support requests and determine initial failure analysis / fault isolation workflow to identify and visualize root cause.
• Hands on operation of laboratory equipment, such as curve tracing, photon emission microscopy, laser stimulation (OBIRCH), and infrared imaging systems.
• Conduct failure analysis workflows using Ga and plasma FIBs, nanoprobing and sample preparation equipment. Mentor and coordinate workflows with supporting technicians.
• Interact with Transmission Electron Imaging (TEM) experts to interpret and explain failure root cause.
• Support continual improvement and development of new workstreams and techniques.
• Develop a thorough understanding of upstream and downstream techniques in the lab and work seamlessly with peers of different disciplines to get high quality results with fast throughput time.

Candidate should have the following behavioral skills:

• Demonstrated strength in teamwork, analytical problem solving, and effective oral and written communication skills.
• Inquisitive, desire to learn and expand knowledge in field.
• Ability to work with multi-functional, multi-cultural teams.
• Strong in decision making and problem solving.

QUALIFICATIONS

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

• Bachelor’s degree in science and engineering major.
• Ireland candidates minimum Level 8 Bachelors’ degree.
• 1+ years’ experience in a semiconductor failure analysis laboratory.

Preferred Qualifications

• Advanced degree (Master’s or Ph.D.) in science and engineering major.
• 3+ years’ experience in a semiconductor failure analysis laboratory supporting advanced technology node technology development.
• 3+ years’ experience with 6T SRAM and logic failure analysis.
• Experience operating fault isolation and failure analysis tools.
• Understanding of FinFET technology architecture.
• Knowledge of wafer fabrication and general microelectronics.
• Knowledge of electrical and physical failure analysis flows for semiconductor.
• Hands on experience operating laboratory equipment.
• Willingness to work Front End or Back End Day Shifts

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

• Review incoming support requests and determine initial failure analysis / fault isolation workflow to identify and visualize root cause.
• Hands on operation of laboratory equipment, such as curve tracing, photon emission microscopy, laser stimulation (OBIRCH), and infrared imaging systems.
• Conduct failure analysis workflows using Ga and plasma FIBs, nanoprobing and sample preparation equipment. Mentor and coordinate workflows with supporting technicians.
• Interact with Transmission Electron Imaging (TEM) experts to interpret and explain failure root cause.
• Support continual improvement and development of new workstreams and techniques.
• Develop a thorough understanding of upstream and downstream techniques in the lab and work seamlessly with peers of different disciplines to get high quality results with fast throughput time