FPGA/ASIC Verification Specialist

at  Orthogone Technologies

Saint-Laurent, QC, Canada -

Start DateExpiry DateSalaryPosted OnExperienceSkillsTelecommuteSponsor Visa
Immediate25 Nov, 2024Not Specified30 Aug, 20243 year(s) or aboveEthernet,Verilog,Systemverilog,Languages,Tcl,Circuit Design,Python,English,Functional Verification,Synthesis,Vhdl,Perl,ScriptingNoNo
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Description:

QUALIFICATIONS


  • Bachelor’s degree or graduate degree in electrical, computer or software engineering or a combination of relevant experiences

  • Minimum of 3-5 years of relevant verification experience and expertise

  • Honed skills in using hardware languages such as Verilog, SystemVerilog or VHDL

  • Experience with verification methodologies including functional verification such as UVM

  • Skills with scripting and languages such as Tcl, Perl, Python, Linux Script

  • Excellent ability to proactively analyze, debug and solve problems, leading to implementation of durable and robust solutions

  • Keen desire to learn and openness to adapt to new methodologies and technologies

  • Gifted ability with describing requirements, documenting architectures and functional descriptions

  • Circuit design or synthesis on FPGAs, ASICs or SoCs expertise (asset)

  • Understanding of communication protocols such as Ethernet (asset)

  • Bilingualism / Spoken and written in French and English (strong asset

THE COMPANY’S HEAD OFFICE IS LOCATED IN THE TECHNOPARC SCIENCE CAMPUS IN MONTREAL, WHICH IS HOME TO MORE THAN 100 COMPANIES SPECIALIZING IN ADVANCED TECHNOLOGIES. WE ARE AN INNOVATIVE COMPANY IN A GROWTH PHASE AND ARE LOOKING TO EXPAND OUR TEAM IN ORDER TO DEVELOP THE NORTH AMERICAN MARKET. WE OFFER YOU AN EXCEPTIONAL EXPERIENCE IN A CONSTANTLY EVOLVING COMPANY THAT PUTS PEOPLE FIRST.

Learn more about the company

Responsibilities:

KEY RESPONSIBILITIES


  • Plan, specify and execute a virtual verification and test plan, based on SystemVerilog / UVM

  • At the prototyping level, validate and verify designs, described in RTL with SystemVerilog and recognized methodologies

  • Ensure the functional quality and integrity of a digital circuit at the block, subsystem, or entire chip level

  • Understand the requirements and functional descriptions of a specialized integrated circuit to ensure its compliance with specifications and flawless operation


REQUIREMENT SUMMARY

Min:3.0Max:5.0 year(s)

Information Technology/IT

Engineering Design / R&D

Information Technology

Graduate

Electrical computer or software engineering or a combination of relevant experiences

Proficient

1

Saint-Laurent, QC, Canada