Full Custom Analog Layout Engineer

at  IMEC Inc

Engineering - Leuven | Just now
Are you a highly motivated Layout engineer with a passion in Analog IC layouts?
What you will do
Are you a highly motivated Layout engineer with a passion in Analog IC layouts? Is your ambition to work in a diverse environment amongst some of the top researchers and engineers in the world? Are you an excellent communicator who thrives on a multi-disciplinary team? If so, please keep reading.
We are seeking an experienced Analog Layout Engineer who would like to make a difference by contributing towards designing the Analog Layouts in various technology nodes.

Here’s what you’ll do:

• Design Analog Layouts like PLL, BG, LVDS, IVREF etc. for various projects for Space Application and various other Research projects at Imec.
• Perform physical verifications like DRC, LVS, EM/IR and other applicable checks for the designed blocks.
• Perform floorplan and top-level routing, keeping in mind the various power domains, and various challenges associated to mixed signal design.
• Perform all CHIP level validations post Dummy fill and other sign-off checks necessary for the tape-out.
• Provide all the deliverables in time to meet the Project deadlines.
• Archival of all the reports and checklists at the end of the Project.

What we do for you
We offer you the opportunity to join one of the world’s premier research centers in nanotechnology at its headquarters in Leuven, Belgium. With your talent, passion and expertise, you’ll become part of a team that makes the impossible possible. Together, we shape the technology that will determine the society of tomorrow.
We are committed to being an inclusive employer and proud of our open, multicultural, and informal working environment with ample possibilities to take initiative and show responsibility. We commit to supporting and guiding you in this process; not only with words but also with tangible actions. Through imec.academy, ’our corporate university’, we actively invest in your development to further your technical and personal growth.
We are aware that your valuable contribution makes imec a top player in its field. Your energy and commitment are therefore appreciated by means of a market appropriate salary with many fringe benefits.

Who you are

• Master’s degree (or equivalent through experience) in Electronics or Electrical Engineering.
• Good experience in designing various Analog Blocks and for Top Level integration of these blocks and signoff checks.
• Sound knowledge of EDA Tools.
• Knowledge about Layout Dependent Effects for deep submicron technology nodes.
• Tape-out experience in various technology nodes.
• Knowledge about Radiation Hardening and its implementation in Layouts will be an added advantage.
• Knowledge about svn , cliosoft or any other versioning tool.
• Good communication skills in English.

IMEC and its affiliates will not accept unsolicited resumes from any source other than directly from a candidate. IMEC will consider unsolicited referrals and/or resumes submitted by vendors such as search firms, staffing agencies, professional recruiters, fee-based referral services and recruiting agencies (hereafter “Agency”) to have been referred by the Agency free of charge. IMEC will not pay a fee to any Agency that does not have a prior written agreement with IMEC, validated by its HR department, in place regarding a specific job opening and allowing to submit resumes.

• Design Analog Layouts like PLL, BG, LVDS, IVREF etc. for various projects for Space Application and various other Research projects at Imec.
• Perform physical verifications like DRC, LVS, EM/IR and other applicable checks for the designed blocks.
• Perform floorplan and top-level routing, keeping in mind the various power domains, and various challenges associated to mixed signal design.
• Perform all CHIP level validations post Dummy fill and other sign-off checks necessary for the tape-out.
• Provide all the deliverables in time to meet the Project deadlines.
• Archival of all the reports and checklists at the end of the Project