GPU Formal Verification Engineer
at Advanced Micro Devices Inc
Sydney, New South Wales, Australia -
Start Date | Expiry Date | Salary | Posted On | Experience | Skills | Telecommute | Sponsor Visa |
---|---|---|---|---|---|---|---|
Immediate | 10 Oct, 2024 | Not Specified | 11 Jul, 2024 | 5 year(s) or above | Verilog,Software Development,Formal Methods,Software,Hardware Verification,Vhdl,C++,C | No | No |
Required Visa Status:
Citizen | GC |
US Citizen | Student Visa |
H1B | CPT |
OPT | H4 Spouse of H1B |
GC Green Card |
Employment Type:
Full Time | Part Time |
Permanent | Independent - 1099 |
Contract – W2 | C2H Independent |
C2H W2 | Contract – Corp 2 Corp |
Contract to Hire – Corp 2 Corp |
Description:
PREFERRED EXPERIENCE:
- Experience in use of formal methods to prove correctness of software or hardware systems
- Hardware verification using SystemVerilog/ UVM or formal verification methodologies
- Understanding of RTL code written in Verilog or VHDL
- Software development using C or C++
- Debug of hardware or software using industry standard debug tools
- Graphics API or graphics pipeline knowledge is an advantage
Responsibilities:
WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
Responsibilities:
THE ROLE:
The ideal candidate has around 5 years of experience in industry in a hardware design or verification role, has an understanding of all aspects of hardware verification, and experience or interest in Formal verification.
KEY RESPONSIBILITIES:
- Collaborate with architects, modelling engineers, and designers on design specifications
- Develop test plans and specify functional coverage
- Develop and maintain formal verification environments
- Develop and maintain SystemVerilog/UVM test benches
- Analyze and improve coverage of the design
- Identify and implement opportunities for improving AMD’s design and verification environment
REQUIREMENT SUMMARY
Min:5.0Max:10.0 year(s)
Information Technology/IT
IT Software - Application Programming / Maintenance
Software Engineering
Graduate
Electrical, Engineering
Proficient
1
Sydney NSW, Australia