Hardware Verification Engineer (CZ)
at Codasip
Brno, Jihovýchod, Czech -
Start Date | Expiry Date | Salary | Posted On | Experience | Skills | Telecommute | Sponsor Visa |
---|---|---|---|---|---|---|---|
Immediate | 18 Feb, 2025 | Not Specified | 19 Nov, 2024 | N/A | Electronics,C++,Vhdl,Verilog,Hardware Verification,Linux,Systemverilog,Reliability,English,Python,Object Oriented Programming | No | No |
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Description:
TL;DR :) Digital Design Verification - CodAL - RISC-V ISA - Processor Microarchitecture - CPU - Start-up culture
Locations: Brno, Prague, Remote CZ (Hybrid mode)
Department: Czech R&D/HW Engineering
Employment Type: Full-Time
Experience: Mid-Senior Level
They say, “Designing microprocessors is hard, expensive, and takes years.” But does it have to? We say, “No.”
Codasip is expanding its teams in the Czech Republic and is happy to announce a vacant CPU Verification Engineer role for a team of DV Engineers who are located in the Czech Republic (Brno) and taking care of Low Power Embedded, High-Performance Embedded, and High-Performance RISC-V application processors.
Moreover, our Verification Domain is split among several European locations - R&D centers in Brno and Prague (Czech Republic), Villeneuve-Loubet (French Design Center), offices in Munich and Barcelona, Poland, Greek R&D (Heraklion and Thessaloniki), and the UK Design Centers (Bristol and Cambridge), which means that you will act in daily concert with our Verification teams as well as Verification Leads such as Philippe Luc, Giorgos Nikiforos, Konstantinos Padarnitsas, Paul Sargent, Laurent Arditi, Christoph Schade, etc.
YOU NEED TO POSSESS THE FOLLOWING KNOWLEDGE AND SKILLS:
- Passion for electronics or embedded SW
- Experience with Hardware verification (VHDL/Verilog simulation, formal or UVM)
- Knowledge of HDL languages (Verilog, VHDL, or SystemVerilog)
- Active usage of versioning tools (Git -preferred)
- Practical usage of Linux
- Experience in Object-Oriented Programming
- Software writing skills (C++ or Python preferred)
- Communicative English. Our team is highly distributed, so English is the primary language
- Eagerness to think outside the box
- Self-organization and reliability
Responsibilities:
- Verify modern RISC-V processors and their components to raise the quality of our deliverables
- Create a pre-silicon verification environment, automated tests, and checkers.
- Design generic solutions and process automation
- Hunt for bugs by creating and using smart algorithms
- Come up with and realize your own ideas on how to improve, automate or upgrade our technologies on an even higher level (you will definitely get our support)
REQUIREMENT SUMMARY
Min:N/AMax:5.0 year(s)
Information Technology/IT
IT Software - Application Programming / Maintenance
Software Engineering
Graduate
Proficient
1
Brno, Czech