IC Layout Design Engineer (Physical Design)

at  IC Enable

With a 20-year history of success delivering design and layout services to demanding Fortune 50 customers, IC Enable is an industry leader in R&D. Now is an exciting time to join our team as we continue to change the industry through experience in technology development, full-custom ASIC and electronics development across the Semiconductor, Medical and Defense industries, including some of the most challenging fabrication processes and product applications.
IC Enable has an exciting opportunity for a IC Layout Design Engineer to join our diverse team executing full-custom integrated circuit development with specific responsibility for driving the layout and verification on complex, high-performance circuits with applications such as PLL, HSC, AGC, SerDes, ADC/DAC and Wireless systems. We are looking for candidates across all experience levels from mid-level to senior level that have obtained the right education and/or skillsets as defined in the qualifications below!

Job Detail:

• Must be willing to relocate to location within reasonable commuting distance to our offices in Richardson, TX (Hybrid)
• Full-Time
• Candidate must be fluent in English
• Candidate must have work authorization for work in the United States or be looking for sponsor in the United States
• Candidate must have a valid passport with an expiration date no sooner than the year 2027

Qualifications

• Mastery of layout and verification tools and methodologies for RF/Analog/Mixed Signal ICs
• Mastery in Cadence layout (Virtuoso XL) and Calibre verification (ERC, DRC, LVS) required
• Able to contribute quickly in a team environment
• Strong communication, debugging and analytical skills with complex technical concepts
• Experience in DFM hierarchical layout construction for efficient verification and integration
• Comprehensive understanding of the target process to balance layout and design needs, e.g. cross-talk, RC delay, electro-migration, IR drop, self-heating, shielding, matching, guard ring, LOD, WPE and latch-up.
• Bachelor’s Degree in Electrical Engineering or Applicable Field (VLSI Coursework preferred for Entry Level candidates)
• Experience in Analog Layout single digit FinFET technologies (preferred, but not required)

Responsibilities

Apply your experience as part of the team to drive success with specific responsibilities that include:

• Deliver on project assignments with integrity, commitment, and excellence
• Efficiently layout sensitive Analog and Mixed Signal circuits conforming to all physical design verification (PDV) requirements while balancing demanding area, performance, and power specifications
• Identify quality and reliability improvements in IC circuit and layout design
• Support or perform design verification from sub-block up through top-level
• Collaborate effectively with local and remote team members
• Proactively look for continuous improvement opportunities in the flow, layout and design methodologies

Benefits
At IC Enable we know that our most valuable asset is our team. We are seeking a candidate who is ready to dive in to our culture and grow with our team. We build our team around those that are humble, hungry and smart. As a part of the IC Enable team you will have access to the following benefits: competitive compensation, medical and full package of ancillary benefits options, company paid life insurance, 401K (with company match) and more.
IC Enable is an Equal Opportunity Employe

• Deliver on project assignments with integrity, commitment, and excellence
• Efficiently layout sensitive Analog and Mixed Signal circuits conforming to all physical design verification (PDV) requirements while balancing demanding area, performance, and power specifications
• Identify quality and reliability improvements in IC circuit and layout design
• Support or perform design verification from sub-block up through top-level
• Collaborate effectively with local and remote team members
• Proactively look for continuous improvement opportunities in the flow, layout and design methodologie