IP Logic Design Engineer

at  Intel

San José, Provincia de San José, Costa Rica -

Start DateExpiry DateSalaryPosted OnExperienceSkillsTelecommuteSponsor Visa
Immediate09 Nov, 2024Not Specified10 Aug, 20242 year(s) or aboveComputer Engineering,Formal Verification,AdditionNoNo
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Description:

JOB DESCRIPTION

As an IP Design Verification Engineer, you will play a critical role in ensuring the flawless execution of integrated circuit designs to meet the highest quality and performance standards. You will collaborate closely with design teams to verify and validate IP designs, ensuring they align with the project specifications. Key Responsibilities:- Design Compliance Assurance: Thoroughly assess and validate integrated circuit designs to ensure they comply with all company-defined requirements and specifications.- Flaw Identification and Resolution: Expertly identify design bugs, inconsistencies, and potential issues, and collaborate with cross-functional teams to resolve them promptly.- Quality Assurance: Contribute to the development of verification environments that are robust and efficient, enhancing the overall quality of the product, service, or system.- Simulation and Debugging: Lead the execution of comprehensive simulations to thoroughly test and validate designs, while effectively troubleshooting and debugging any issues that arise.- Performance Optimization: Continuously improve verification processes, methodologies, and tools to enhance efficiency and ensure that products, services, or systems perform as expected.

QUALIFICATIONS

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are a plus factor in identifying top candidates. Experience listed below would be obtained through your school work/classes/research and/or relevant previous job and/or internship experiences.

MINIMUM REQUIRED QUALIFICATION:

  • Bachelors in electrical engineering, Computer Engineering, or a related field.
  • 2+ years’ experience in hardware design/verification.
  • Proficiency in hardware description languages (ex: Verilog or System Verilog)
  • Experience with Hardware Verification Methodologies like OVM/UVM.
  • Experience in scripting languages (e.g., Python, Perl).
  • Proficiency in English, intermediate to advanced.
  • Costa Rica unrestricted work permit.

Additional Preferred Qualifications:

  • Masters in electrical engineering, Computer Engineering, or a related field.
  • Knowledge of UVM methodology, and Formal Verification.
  • Knowledge of Linux/Unix.
  • Familiarity with industry-standard EDA (Electronic Design Automation) tools and flows.

Responsibilities:

Please refer the Job description for details


REQUIREMENT SUMMARY

Min:2.0Max:7.0 year(s)

Electrical/Electronic Manufacturing

Engineering Design / R&D

Other

Graduate

Proficient

1

San José, Provincia de San José, Costa Rica